8,398 research outputs found

    A Point-of-Care Device for Molecular Diagnosis Based on CMOS SPAD Detectors with Integrated Microfluidics

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    We describe the integration of techniques and technologies to develop a Point-of-Care for molecular diagnosis PoC-MD, based on a fluorescence lifetime measurement. Our PoC-MD is a low-cost, simple, fast, and easy-to-use general-purpose platform, aimed at carrying out fast diagnostics test through label detection of a variety of biomarkers. It is based on a 1-D array of 10 ultra-sensitive Single-Photon Avalanche Diode (SPAD) detectors made in a 0.18 μm High-Voltage Complementary Metal Oxide Semiconductor (HV-CMOS) technology. A custom microfluidic polydimethylsiloxane cartridge to insert the sample is straightforwardly positioned on top of the SPAD array without any alignment procedure with the SPAD array. Moreover, the proximity between the sample and the gate-operated SPAD sensor makes unnecessary any lens or optical filters to detect the fluorescence for long lifetime fluorescent dyes, such as quantum dots. Additionally, the use of a low-cost laser diode as pulsed excitation source and a Field-Programmable Gate Array (FPGA) to implement the control and processing electronics, makes the device flexible and easy to adapt to the target label molecule by only changing the laser diode. Using this device, reliable and sensitive real-time proof-of-concept fluorescence lifetime measurement of quantum dot QdotTM 605 streptavidin conjugate is demonstrated

    Array-based architecture for FET-based, nanoscale electronics

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    Advances in our basic scientific understanding at the molecular and atomic level place us on the verge of engineering designer structures with key features at the single nanometer scale. This offers us the opportunity to design computing systems at what may be the ultimate limits on device size. At this scale, we are faced with new challenges and a new cost structure which motivates different computing architectures than we found efficient and appropriate in conventional very large scale integration (VLSI). We sketch a basic architecture for nanoscale electronics based on carbon nanotubes, silicon nanowires, and nano-scale FETs. This architecture can provide universal logic functionality with all logic and signal restoration operating at the nanoscale. The key properties of this architecture are its minimalism, defect tolerance, and compatibility with emerging bottom-up nanoscale fabrication techniques. The architecture further supports micro-to-nanoscale interfacing for communication with conventional integrated circuits and bootstrap loading

    Programmable Logic Devices in Experimental Quantum Optics

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    We discuss the unique capabilities of programmable logic devices (PLD's) for experimental quantum optics and describe basic procedures of design and implementation. Examples of advanced applications include optical metrology and feedback control of quantum dynamical systems. As a tutorial illustration of the PLD implementation process, a field programmable gate array (FPGA) controller is used to stabilize the output of a Fabry-Perot cavity

    Fault Tolerance of Programmable Devices

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    Optical multi-context scrubbing operation on a redundant system

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    This paper presents a proposal of the world-first optical multi-context scrubbing operation on a redundant system that can maintain the state of a sequential circuit and the operation continuously without any interruption on a radiation-hardened optically reconfigurable gate array even after a permanent failure suddenly happens on the sequential circuit or a flip-flop by radiation. Up to now, a high-speed optical scrubbing operation has been demonstrated on a radiation-hardened optically reconfigurable gate array. In addition, a multi-context scrubbing operation based on the high-speed optical scrubbing operation has already been demonstrated. Although the multi-context scrubbing operation presents the benefit that it can treat both soft errors and permanent failures caused by radiation simultaneously, the conventional contributions have never presented how to maintain the state of a sequential circuit after a permanent failure occurs on flip-flops. Therefore, in the conventional multi-context scrubbing operation, all the operations must be restarted from the initial condition each time a permanent failure occurs on a programmable gate array. As a result, conventional multi-context scrubbing operations could not be applied for real-time systems. The proposed optical multi-context scrubbing method that can solve the issue has been experimentally evaluated on a radiation-hardened optically reconfigurable gate array

    Large-Scale Optical Neural Networks based on Photoelectric Multiplication

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    Recent success in deep neural networks has generated strong interest in hardware accelerators to improve speed and energy consumption. This paper presents a new type of photonic accelerator based on coherent detection that is scalable to large (N106N \gtrsim 10^6) networks and can be operated at high (GHz) speeds and very low (sub-aJ) energies per multiply-and-accumulate (MAC), using the massive spatial multiplexing enabled by standard free-space optical components. In contrast to previous approaches, both weights and inputs are optically encoded so that the network can be reprogrammed and trained on the fly. Simulations of the network using models for digit- and image-classification reveal a "standard quantum limit" for optical neural networks, set by photodetector shot noise. This bound, which can be as low as 50 zJ/MAC, suggests performance below the thermodynamic (Landauer) limit for digital irreversible computation is theoretically possible in this device. The proposed accelerator can implement both fully-connected and convolutional networks. We also present a scheme for back-propagation and training that can be performed in the same hardware. This architecture will enable a new class of ultra-low-energy processors for deep learning.Comment: Text: 10 pages, 5 figures, 1 table. Supplementary: 8 pages, 5, figures, 2 table

    Integrating a QPSK Quantum Key Distribution Link

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    We present the integration of the optical and electronic subsystems of a BB84-QKD fiber link. A highspeed FPGA MODEM generates the random QPSK sequences for a fiber-optic delayed self-homodyne scheme using APD detectors.Comment: 2 pages, 4 figures, European Conference on Optical Communication 200
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