Advanced Computer Dormant Reliability Study Final Report

Reliability of integrated circuits and discrete components of electronics for computer and dormant module for Minuteman

Wafer-scale integration of semiconductor memory.

This work is directed towards a study of full-slice or "wafer-scale integrated" - semiconductor memory. Previous approaches to full slice technology are studied and critically compared. It is shown that a fault-tolerant, fixed-interconnection approach offers many advantages; such a technique forms the basis of the experimental work. The disadvantages of the conventional technology are reviewed to illustrate the potential improvements in cost, packing density and reliability obtainable with wafer-scale integration (W.S.l). Iterative chip arrays are modelled by a pseudorandom fault distribution; algorithms to control the linking of adjacent good - chips into linear chains are proposed and investigated by computer simulation. It is demonstrated that long chains may be produced at practicable yield levels. The on-chip control circuitry and the external control electronics required to implement one particular algorithm are described in relation to a TTL simulation of an array of 4 X 4 integrated circuit chips. A layout of the on-chip control logic is shown to require (in 40 dynamic MOS circuitry) an area equivalent to ~250 shift register stages -a reasonable overhead on large memories. Structures are proposed to extend the fixed-interconnection, fault-tolerant concept to parallel/serial organised memory - covering RAM, ROM and Associative Memory applications requiring up to~ 2M bits of storage. Potential problem areas in implementing W.S.I are discussed and it is concluded that current technology is capable of manufacturing such devices. A detailed cost comparison of the conventional and W.S.I approaches to large serial memories illustrates the potential savings available with wafer-scale integration. The problem of gaining industrial acceptance for W.S.I is discussed in relation to known and anticipated views- of new technology. The thesis concludes with suggestions for further work in the general field of wafer-scale integration

Total Hip Joint Replacement Biotelemetry System

The development of a biotelemetry system that is hermetically sealed within a total hip replacement implant is reported. The telemetry system transmits six channels of stress data to reconstruct the major forces acting on the neck of the prosthesis and uses an induction power coupling technique to eliminate the need for internal batteries. The activities associated with the telemetry microminiaturization, data recovery console, hardware fabrications, power induction systems, electrical and mechanical testing and hermetic sealing test results are discussed

NASA Space Engineering Research Center for VLSI System Design

This annual report outlines the activities of the past year at the NASA SERC on VLSI Design. Highlights for this year include the following: a significant breakthrough was achieved in utilizing commercial IC foundries for producing flight electronics; the first two flight qualified chips were designed, fabricated, and tested and are now being delivered into NASA flight systems; and a new technology transfer mechanism has been established to transfer VLSI advances into NASA and commercial systems

Feasibility of developing LSI microcircuit reliability prediction models

In the proposed modeling approach, when any of the essential key factors are not known initially, they can be approximated in various ways with a known impact on the accuracy of the final predictions. For example, on any program where reliability predictions are started at interim states of project completion, a-priori approximate estimates of the key factors are established for making preliminary predictions. Later these are refined for greater accuracy as subsequent program information of a more definitive nature becomes available. Specific steps to develop, validate and verify these new models are described

The 2018 GaN power electronics roadmap

GaN is a compound semiconductor that has a tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here

Investigation of a piezo-polymer array transducer for pulse-echo ultrasonic material examinations

The aim of this investigation was to make a flexible array of pulse-echo ultrasound transducers by etching two orthogonal linear arrays of conducting elements into the metallisation of either side of a sheet of PVdF. These would then be multiplexed under computer control in an X-Y raster, thereby forming an image of subsurface defects in a material specimen. A potential source model was used to predict the sensitivity of a single element air-backed transducer far from resonance. Initial investigations confirmed the predictions, and reaffirmed the results of previous workers. In making a prototype array, it was found necessary to use a bi-laminar arrangement with a central ground plane, due to difficulties with crosstalk and charge leakage into the specimen materials. The radiation pattern of this array was tested and found to agree with the predictions for Fraunhofer (Far-Field) radiation. A 10 MHz analogue to digital converter was constructed to interface with the IBM-PC clone as a transient recorder, through a data capture program written in 'C'. However, the electrical noise generated by the PC was found to interfere strongly with the signal from the array transducer. A wide-band amplifier and full-wave rectifier was then added to the multiplexer and A/D converter, and the system enclosed in an electrically isolated environment, which made it possible to obtain clear signal data from the transducer. Non-linear regression was implemented in the software, to smooth the data and locate echo peaks, and the most frequently occurring peak separation was used to indicate sample thickness at that location in a false-colour mapping on the screen of the PC