Acoustical Ranging Techniques in Embedded Wireless Sensor Networked Devices

Location sensing provides endless opportunities for a wide range of applications in GPS-obstructed environments; where, typically, there is a need for higher degree of accuracy. In this article, we focus on robust range estimation, an important prerequisite for fine-grained localization. Motivated by the promise of acoustic in delivering high ranging accuracy, we present the design, implementation and evaluation of acoustic (both ultrasound and audible) ranging systems.We distill the limitations of acoustic ranging; and present efficient signal designs and detection algorithms to overcome the challenges of coverage, range, accuracy/resolution, tolerance to Doppler’s effect, and audible intensity. We evaluate our proposed techniques experimentally on TWEET, a low-power platform purpose-built for acoustic ranging applications. Our experiments demonstrate an operational range of 20 m (outdoor) and an average accuracy 2 cm in the ultrasound domain. Finally, we present the design of an audible-range acoustic tracking service that encompasses the benefits of a near-inaudible acoustic broadband chirp and approximately two times increase in Doppler tolerance to achieve better performance

The G0 Experiment: Apparatus for Parity-Violating Electron Scattering Measurements at Forward and Backward Angles

In the G0 experiment, performed at Jefferson Lab, the parity-violating elastic scattering of electrons from protons and quasi-elastic scattering from deuterons is measured in order to determine the neutral weak currents of the nucleon. Asymmetries as small as 1 part per million in the scattering of a polarized electron beam are determined using a dedicated apparatus. It consists of specialized beam-monitoring and control systems, a cryogenic hydrogen (or deuterium) target, and a superconducting, toroidal magnetic spectrometer equipped with plastic scintillation and aerogel Cerenkov detectors, as well as fast readout electronics for the measurement of individual events. The overall design and performance of this experimental system is discussed.Comment: Submitted to Nuclear Instruments and Method

Improving elevation perception with a tool for image-guided head-related transfer function selection

This paper proposes an image-guided HRTF selection procedure that exploits the relation between features of the pinna shape and HRTF notches. Using a 2D image of a subject's pinna, the procedure selects from a database the HRTF set that best fits the anthropometry of that subject. The proposed procedure is designed to be quickly applied and easy to use for a user without previous knowledge on binaural audio technologies. The entire process is evaluated by means of an auditory model for sound localization in the mid-sagittal plane available from previous literature. Using virtual subjects from a HRTF database, a virtual experiment is implemented to assess the vertical localization performance of the database subjects when they are provided with HRTF sets selected by the proposed procedure. Results report a statistically significant improvement in predictions of localization performance for selected HRTFs compared to KEMAR HRTF which is a commercial standard in many binaural audio solutions; moreover, the proposed analysis provides useful indications to refine the perceptually-motivated metrics that guides the selection

The design and implementation of a wideband digital radio receiver

Historically radio has been implemented using largely analogue circuitry. Improvements in mixed signal and digital signal processing technology are rapidly leading towards a largely digital approach, with down-conversion and filtering moving to the digital signal processing domain. Advantages of this technology include increased performance and functionality, as well as reduced cost. Wideband receivers place the heaviest demands on both mixed signal and digital signal processing technology, requiring high spurious free dynamic range (SFDR) and signal processing bandwidths. This dissertation investigates the extent to which current digital technology is able to meet these demands and compete with the proven architectures of analogue receivers. A scalable generalised digital radio receiver capable of operating in the HF and VHF bands was designed, implemented and tested, yielding instantaneous bandwidths in excess of 10 MHz with a spurious-free dynamic range exceeding 80 decibels below carrier (dBc). The results achieved reflect favourably on the digital receiver architecture. While the necessity for minimal analogue circuitry will possibly always exist, digital radio architectures are currently able to compete with analogue counterparts. The digital receiver is simple to manufacture, based on the use of largely commercial off-the-shelf (COTS) components, and exhibits extreme flexibility and high performance when compared with comparably priced analogue receivers

A Fast Digital Integrator for magnetic measurements

In this work, the Fast Digital Integrator (FDI), conceived for characterizing dynamic features of superconducting magnets and measuring fast transients of magnetic fields at the European Organization for Nuclear Research (CERN) and other high-energy physics research centres, is presented. FDI development was carried out inside a framework of cooperation between the group of Magnet Tests and Measurements of CERN and the Department of Engineering of the University of Sannio. Drawbacks related to measurement time decrease of main high-performance analog-to-digital architectures, such as Sigma-Delta and integrators, are overcome by founding the design on (i) a new generation of successive-approximation converters, for high resolution (18-bit) at high rate (500 kS/s), (ii) a digital signal processor, for on-line down-sampling by integrating the input signal, (iii) a custom time base, based on a Universal Time Counter, for reducing time-domain uncertainty, and (iv) a PXI board, for high bus transfer rate, as well as noise and heat immunity. A metrological analysis, aimed at verifying the effect of main uncertainty sources, systematic errors, and design parameters on the instrument performance is presented. In particular, results of an analytical study, a preliminary numerical analysis, and a comprehensive multi-factor analysis carried out to confirm the instrument design, are reported. Then, the selection of physical components and the FDI implementation on a PXI board according to the above described conceptual architecture are highlighted. The on-line integration algorithm, developed on the DSP in order to achieve a real-time Nyquist bandwidth of 125 kHz on the flux, is described. C++ classes for remote control of FDI, developed as a part of a new software framework, the Flexible Framework for Magnetic Measurements, conceived for managing a wide spectrum of magnetic measurements techniques, are described. Experimental results of metrological and throughput characterization of FDI are reported. In particular, in metrological characterization, FDI working as a digitizer and as an integrator, was assessed by means of static, dynamic, and time base tests. Typical values of static integral nonlinearity of ±7 ppm, ±3 ppm of 24-h stability, and 108 dB of signal-to-noise-anddistortion ratio at 10 Hz on Nyquist bandwidth of 125 kHz, were surveyed during the integrator working. The actual throughput rate was measured by a specific procedure of PXI bus analysis, by highlighting typical values of 1 MB/s. Finally, the experimental campaign, carried out at CERN facilities of superconducting magnet testing for on-field qualification of FDI, is illustrated. In particular, the FDI was included in a measurement station using also the new generation of fast transducers. The performance of such a station was compared with the one of the previous standard station used in series tests for qualifying LHC magnets. All the results highlight the FDI full capability of acting as the new de-facto standard for high-performance magnetic measurements at CERN and in other high-energy physics research centres

FPGA design methodology for industrial control systems—a review

This paper reviews the state of the art of fieldprogrammable gate array (FPGA) design methodologies with a focus on industrial control system applications. This paper starts with an overview of FPGA technology development, followed by a presentation of design methodologies, development tools and relevant CAD environments, including the use of portable hardware description languages and system level programming/design tools. They enable a holistic functional approach with the major advantage of setting up a unique modeling and evaluation environment for complete industrial electronics systems. Three main design rules are then presented. These are algorithm refinement, modularity, and systematic search for the best compromise between the control performance and the architectural constraints. An overview of contributions and limits of FPGAs is also given, followed by a short survey of FPGA-based intelligent controllers for modern industrial systems. Finally, two complete and timely case studies are presented to illustrate the benefits of an FPGA implementation when using the proposed system modeling and design methodology. These consist of the direct torque control for induction motor drives and the control of a diesel-driven synchronous stand-alone generator with the help of fuzzy logic

Characterizing Single Event Upsets within the lpGBT-based End-of-Substructure Card

The CERN ATLAS particle physics experiment is currently undergoing a significant system upgrade (ATLAS Phase II upgrade). As a result of the upgrade the experiment's Inner Tracker (ITk) and the front-end electronics of the ITk are being redesigned to handle increased data rates and a higher radiation environment. Within the ITk, the End Of Substructure (EoS) card is a new custom designed digital board that will provide the data, command, and power interface between on and off-detector electronics. Each EoS card makes use of one or two custom CERN designed low power Gigabit Transceivers (lpGBTs) ASICS that have been created for the purposes of supporting high bandwidth optical links in high radiation environments throughout CERN experiments. An estimated 1552 EoS cards will be installed in the ITk, each representing a potential point of failure. Given the complexity and quantity of new hardware designs involved, and that the EoS cards will be not be accessible or serviceable after the upgrade has been completed, there is a need for rigorous quality assurance (QA) and quality control (QC) testing. This thesis therefore describes an independent test setup commissioned, by the author, at the University of Cape Town (UCT) Physics Department for characterising aspects of EoS card's operation under representative radiation conditions. Specifically, the radiation environment of the ITk poses a challenge to electronics as energetic particles can deposit their energy within the circuit material resulting in an erroneous change in logic known as a Single Event Upset (SEU). The lpGBT is a radiation tolerant ASIC and employs digital signal processing (DSP) and triple modular redundancy (TMR) techniques to mitigate against the effects of SEUs on transmitted data. This thesis presents an experiment setup which tests this hypothesis that the DSP stages are susceptible to data corruption caused by SEUs. In addition the setup also attempts to characterize the susceptibility of the scrambler, encoder, and interleaver stages within the lpGBT to SEUs. This experiment is carried out by actively irradiating an EoS card with a neutron source (energy spectrum of up to 11 MeV), while emulating each stage on a non-irradiated off-board FPGA. Additionally and in support of this experiment, the existing firmware and LabView automation software developed at DESY are extended. Results from this thesis indicate that the DSP stages within the lpGBT are susceptible to data corruption caused by SEUs. It was also shown that the susceptibility of the experiment itself did not effect the measured SEU rates. Finally, preliminary results suggest that susceptibility of the DSP stages within the lpGBT can be characterized as the Bit Error Rate (BER) increases depending on the number of active stages