Optical multi-context scrubbing operation on a redundant system

This paper presents a proposal of the world-first optical multi-context scrubbing operation on a redundant system that can maintain the state of a sequential circuit and the operation continuously without any interruption on a radiation-hardened optically reconfigurable gate array even after a permanent failure suddenly happens on the sequential circuit or a flip-flop by radiation. Up to now, a high-speed optical scrubbing operation has been demonstrated on a radiation-hardened optically reconfigurable gate array. In addition, a multi-context scrubbing operation based on the high-speed optical scrubbing operation has already been demonstrated. Although the multi-context scrubbing operation presents the benefit that it can treat both soft errors and permanent failures caused by radiation simultaneously, the conventional contributions have never presented how to maintain the state of a sequential circuit after a permanent failure occurs on flip-flops. Therefore, in the conventional multi-context scrubbing operation, all the operations must be restarted from the initial condition each time a permanent failure occurs on a programmable gate array. As a result, conventional multi-context scrubbing operations could not be applied for real-time systems. The proposed optical multi-context scrubbing method that can solve the issue has been experimentally evaluated on a radiation-hardened optically reconfigurable gate array

Parallel and Distributed Computing

The 14 chapters presented in this book cover a wide variety of representative works ranging from hardware design to application development. Particularly, the topics that are addressed are programmable and reconfigurable devices and systems, dependability of GPUs (General Purpose Units), network topologies, cache coherence protocols, resource allocation, scheduling algorithms, peertopeer networks, largescale network simulation, and parallel routines and algorithms. In this way, the articles included in this book constitute an excellent reference for engineers and researchers who have particular interests in each of these topics in parallel and distributed computing

Optical performance monitoring in optical packet-switched networks

Para poder satisfacer la demanda de mayores anchos de banda y los requisitos de los nuevos servicios, se espera que se produzca una evolución de las redes ópticas hacia arquitecturas reconfigurables dinámicamente. Esta evolución subraya la importancia de ofrecer soluciones en la que la escalabilidad y la flexibilidad sean las principales directrices. De acuerdo a estas características, las redes ópticas de conmutación de paquetes (OPS) proporcionan altas capacidades de transmisión, eficiencia en ancho de banda y excelente flexibilidad, además de permitir el procesado de los paquetes directamente en la capa óptica. En este escenario, la solución all-optical label switching (AOLS) resuelve el cuello de botella impuesto por los nodos que realizan el procesado en el dominio eléctrico. A pesar de los progresos en el campo del networking óptico, las redes totalmente ópticas todavía se consideran una solución lejana . Por tanto, es importante desarrollar un escenario de migración factible y gradual desde las actuales redes ópticas basadas en la conmutación de circuitos (OCS). Uno de los objetivos de esta tesis se centra en la propuesta de escenarios de migración basados en redes híbridas que combinan diferentes tecnologías de conmutación. Además, se analiza la arquitectura de una red OPS compuesta de nodos que incorporan nuevas funcionalidades relacionadas con labores de monitorización y esquemas de recuperación. Las redes ópticas permiten mejorar la transparencia de la red, pero a costa de aumentar la complejidad de las tareas de gesión. En este escenario, la monitorización óptica de prestaciones (OPM) surge como una tecnología capaz de facilitar la administración de las redes OPS, en las que cada paquete sigue su propia ruta en la red y sufre un diferente nivel de degradación al llegar a su destino. Aquí reside la importancia de OPM para garantizar los requisitos de calidad de cada paquete.Vilar Mateo, R. (2010). Optical performance monitoring in optical packet-switched networks [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/8926Palanci

Characterisation of a reconfigurable free space optical interconnect system for parallel computing applications and experimental validation using rapid prototyping technology

Free-space optical interconnects (FSOIs) are widely seen as a potential solution to present and future bandwidth bottlenecks for parallel processing applications. This thesis will be focused on the study of a particular FSOI system called Optical Highway (OH). The OH is a polarised beam routing system which uses Polarising Beam Splitters and Liquid Crystals (PBS/LC) assemblies to perform reconfigurable interconnection networks. The properties of the OH make it suitable for implementing different passive static networks. A technology known as Rapid Prototyping (RP) will be employed for the first time in order to create optomechanical structures at low cost and low production times. Off-theshelf optical components will also be characterised in order to implement the OH. Additionally, properties such as reconfigurability, scalability, tolerance to misalignment and polarisation losses will be analysed. The OH will be modelled at three levels: node, optical stage and architecture. Different designs will be proposed and a particular architecture, Optimised Cut-Through Ring (OCTR), will be experimentally implemented. Finally, based on this architecture, a new set of properties will be defined in order to optimise the efficiency of the optical channels

On-chip generation and characterization of quantum light

Technologies based on quantum mechanics promise to revolutionize the collection, processing and communication of information. However, due to the fragility of quantum coherence, complex quantum states can only exist in highly isolated and stable environments. One suitable environment is that of a quantum photonic chip. Quantum integrated photonics seeks to generate, process and detect complex quantum states inside a photonic chip. This thesis presents theory and experimental verification of novel approaches for the integration of various functionalities into quantum photonic chips in a scalable way. As such, this thesis encompasses a broad area of physics including quantum optics and nonlinear photonics. The results presented in this thesis have applications in the areas of quantum enhanced measurement, communication and information processing. In particular we develop the theory and experimentally demonstrate flexible on-chip sources of spatially entangled photons, the state of which can be reconfigured alloptically. We show how such techniques could enable the realization of simple cluster state quantum computing algorithms using spatially encoded two-photon states. Furthermore, we suggest new and practical approaches for the efficient characterization of mass produced nonlinear quantum photonic chips. Finally we develop and experimentally demonstrate a scalable method for the full quantum state tomography of multi-photon states on-chip. Importantly this technique only requires a linearly increasing number of single photon detectors relative to the number of photons in the state being characterized, and is also highly compatible with on-chip single photon detectors

Equalizer State Caching for Fast Data Recovery in Optically-Switched Data Center Networks

Optical switching offers the potential to significantly scale the capacity of data center networks (DCN) with a simultaneous reduction in switching time and power consumption. Previous research has shown that end-to-end switching time, which is the sum of the switch configuration time and the clock and data recovery (CDR) locking time, should be kept within a few nanoseconds for high network throughput. This challenge of low switching time has motivated research into fast optical switches, ultra-fast clock and amplitude recovery techniques. Concurrently, the data rate between server-to-server and server-to-switch interconnect is increasing drastically from the current 100 Gb/s (4×25 Gb/s) to 400 Gb/s and beyond, motivating the use of high order formats such as 50-GBaud four-level pulse-amplitude modulation (PAM-4) for signalling. Since PAM-4 is more sensitive to noise and distortion, digital equalizers are generally needed to compensate for impairments such as transceiver frequency rolloff, dispersion and optical filtering, adding additional time for equalizer adaptation and power consumption that are undesired for fast optical switching systems. Here we propose and investigate an equalizer state caching technique that reduces equalizer adaptation time and computation power consumption for fast optical switching systems, underpinning optically-switched DCNs using high baud rate and impairment-sensitive formats. Through a proof-of-concept experiment, we study the performance of the proposed equalizer state caching scheme in a three-node optical switching system using 56 GBaud PAM-4. Our experimental results show that the proposed scheme can tolerate up to 0.8-nm (100-GHz) instantaneous wavelength change with an adaptation delay of only 0.36 ns. Practical considerations such as clock phase misalignment, temperature-induced wavelength drift, and equalizer precision are also studied

Advances in Solid State Circuit Technologies

This book brings together contributions from experts in the fields to describe the current status of important topics in solid-state circuit technologies. It consists of 20 chapters which are grouped under the following categories: general information, circuits and devices, materials, and characterization techniques. These chapters have been written by renowned experts in the respective fields making this book valuable to the integrated circuits and materials science communities. It is intended for a diverse readership including electrical engineers and material scientists in the industry and academic institutions. Readers will be able to familiarize themselves with the latest technologies in the various fields

Hardware-Software Integrated Silicon Photonic Systems

Fabrication of integrated photonic devices and circuits in a CMOS-compatible process or foundry is the essence of the silicon photonic platform. Optical devices in this platform are enabled by the high index contrast between silicon and silicon on insulator. These devices offer potential benefits when integrated with existing and emerging high performance microelectronics. Integration of silicon photonics with small footprints and power-efficient and high-bandwidth operation has long been cited as a solution to existing issues in high performance interconnects for telecommunications and data communication. Stemming from this historic application in communications, new applications in sensing arrays, biochemistry, and even entertainment continue to grow. However, for many technologies to successfully adopt silicon photonics and reap the perceived benefits, the silicon photonic platform must extend toward development of a full ecosystem. Such extension includes implementation of low cost and robust electronic-photonic packaging techniques for all applications. In an ecosystem implemented with services ranging from device fabrication all the way to packaged products, ease-of-use and ease-of-deployment in systems that require many hardware and software components becomes possible. With the onset of the Internet of Things (IoT), nearly all technologies—sensors, compute, communication devices, etc.—persist in systems with some level of localized or distributed software interaction. These interactions often require a level of networked communications. For silicon photonics to penetrate technologies comprising IoT, it is advantageous to implement such devices in a hardware-software integrated way. Meaning, all functionalities and interactions related to the silicon photonic devices are well defined in terms of the physicality of the hardware. This hardware is then abstracted into various levels of software as needed in the system. The power of hardware-software integration allows many of the piece-wise demonstrated functionalities of silicon photonics to easily translate to commercial implementation. This work begins by briefly highlighting the challenges and solutions for transforming existing silicon photonic platforms to a full-fledged silicon photonic ecosystem. The highlighted solutions in development consist of tools for fabrication, testing, subsystem packaging, and system validation. Building off the knowledge of a silicon photonic ecosystem in development, this work continues by demonstrating various levels of hardware-software integration. These are primarily focused on silicon photonic interconnects. The first hardware-software integration-focused portion of this work explores silicon microring-based devices as a key building block for greater silicon photonic subsystems. The microring’s sensitivity to thermal fluctuations is identified not as a flaw, but as a tool for functionalization. A logical control system is implemented to mitigate thermal effects that would normally render a microring resonator inoperable. The mechanism to control the microring is extended and abstracted with software programmability to offer wavelength routing as a network primitive. This functionality, available through hardware-software integration, offers the possibility for ubiquitous deployment of such microring devices in future photonic interconnection networks. The second hardware-software integration-focused portion of this work explores dynamic silicon photonic switching devices and circuits. Specifically, interactions with and implications of high-speed data propagation and link layer control are demonstrated. The characteristics of photonic link setup include transients due to physical layer optical effects, latencies involved with initializing burst mode links, and optical link quality. The impacts on the functionalities and performance offered by photonic devices are explored. An optical network interface platform is devised using FPGAs to encapsulate hardware and software for controlling these characteristics using custom hardware description language, firmware, and software. A basic version of a silicon photonic network controller using FPGAs is used as a tool to demonstrate a highly scalable switch architecture using microring resonators. This architecture would not be possible without some semblance of this controller, combined with advanced electronic-photonic packaging. A more advanced deployment of the network interface platform is used to demonstrate a method for accelerating photonic links using out-of-band arbitration. A first demonstration of this platform is performed on a silicon photonic microring router network. A second demonstration is used to further explore the feasibility of full hardware-software integrated photonic device actuation, link layer control, and out-of-band arbitration. The demonstration is performed on a complete silicon photonic network with both spatial switching and wavelength routing functionalities. The aforementioned hardware-software integration mechanisms are rigorously tested for data communications applications. Capabilities are shown for very reliable, low latency, and dynamic high-speed data delivery using silicon photonic devices. Applying these mechanisms to complete electronic-photonic packaged subsystems provides a strong path to commercial manifestations of functional silicon photonic devices