Gestión de jerarquías de memoria híbridas a nivel de sistema

Tesis inédita de la Universidad Complutense de Madrid, Facultad de Informática, Departamento de Arquitectura de Computadoras y Automática y de Ku Leuven, Arenberg Doctoral School, Faculty of Engineering Science, leída el 11/05/2017.In electronics and computer science, the term ‘memory’ generally refers to devices that are used to store information that we use in various appliances ranging from our PCs to all hand-held devices, smart appliances etc. Primary/main memory is used for storage systems that function at a high speed (i.e. RAM). The primary memory is often associated with addressable semiconductor memory, i.e. integrated circuits consisting of silicon-based transistors, used for example as primary memory but also other purposes in computers and other digital electronic devices. The secondary/auxiliary memory, in comparison provides program and data storage that is slower to access but offers larger capacity. Examples include external hard drives, portable flash drives, CDs, and DVDs. These devices and media must be either plugged in or inserted into a computer in order to be accessed by the system. Since secondary storage technology is not always connected to the computer, it is commonly used for backing up data. The term storage is often used to describe secondary memory. Secondary memory stores a large amount of data at lesser cost per byte than primary memory; this makes secondary storage about two orders of magnitude less expensive than primary storage. There are two main types of semiconductor memory: volatile and nonvolatile. Examples of non-volatile memory are ‘Flash’ memory (sometimes used as secondary, sometimes primary computer memory) and ROM/PROM/EPROM/EEPROM memory (used for firmware such as boot programs). Examples of volatile memory are primary memory (typically dynamic RAM, DRAM), and fast CPU cache memory (typically static RAM, SRAM, which is fast but energy-consuming and offer lower memory capacity per are a unit than DRAM). Non-volatile memory technologies in Si-based electronics date back to the 1990s. Flash memory is widely used in consumer electronic products such as cellphones and music players and NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. The rapid increase of leakage currents in Silicon CMOS transistors with scaling poses a big challenge for the integration of SRAM memories. There is also the case of susceptibility to read/write failure with low power schemes. As a result of this, over the past decade, there has been an extensive pooling of time, resources and effort towards developing emerging memory technologies like Resistive RAM (ReRAM/RRAM), STT-MRAM, Domain Wall Memory and Phase Change Memory(PRAM). Emerging non-volatile memory technologies promise new memories to store more data at less cost than the expensive-to build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. These new memory technologies combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the non-volatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. The research and information on these Non-Volatile Memory (NVM) technologies has matured over the last decade. These NVMs are now being explored thoroughly nowadays as viable replacements for conventional SRAM based memories even for the higher levels of the memory hierarchy. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional(3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years...En el campo de la informática, el término ‘memoria’ se refiere generalmente a dispositivos que son usados para almacenar información que posteriormente será usada en diversos dispositivos, desde computadoras personales (PC), móviles, dispositivos inteligentes, etc. La memoria principal del sistema se utiliza para almacenar los datos e instrucciones de los procesos que se encuentre en ejecución, por lo que se requiere que funcionen a alta velocidad (por ejemplo, DRAM). La memoria principal está implementada habitualmente mediante memorias semiconductoras direccionables, siendo DRAM y SRAM los principales exponentes. Por otro lado, la memoria auxiliar o secundaria proporciona almacenaje(para ficheros, por ejemplo); es más lenta pero ofrece una mayor capacidad. Ejemplos típicos de memoria secundaria son discos duros, memorias flash portables, CDs y DVDs. Debido a que estos dispositivos no necesitan estar conectados a la computadora de forma permanente, son muy utilizados para almacenar copias de seguridad. La memoria secundaria almacena una gran cantidad de datos aun coste menor por bit que la memoria principal, siendo habitualmente dos órdenes de magnitud más barata que la memoria primaria. Existen dos tipos de memorias de tipo semiconductor: volátiles y no volátiles. Ejemplos de memorias no volátiles son las memorias Flash (algunas veces usadas como memoria secundaria y otras veces como memoria principal) y memorias ROM/PROM/EPROM/EEPROM (usadas para firmware como programas de arranque). Ejemplos de memoria volátil son las memorias DRAM (RAM dinámica), actualmente la opción predominante a la hora de implementar la memoria principal, y las memorias SRAM (RAM estática) más rápida y costosa, utilizada para los diferentes niveles de cache. Las tecnologías de memorias no volátiles basadas en electrónica de silicio se remontan a la década de1990. Una variante de memoria de almacenaje por carga denominada como memoria Flash es mundialmente usada en productos electrónicos de consumo como telefonía móvil y reproductores de música mientras NAND Flash solid state disks(SSDs) están progresivamente desplazando a los dispositivos de disco duro como principal unidad de almacenamiento en computadoras portátiles, de escritorio e incluso en centros de datos. En la actualidad, hay varios factores que amenazan la actual predominancia de memorias semiconductoras basadas en cargas (capacitivas). Por un lado, se está alcanzando el límite de integración de las memorias Flash, lo que compromete su escalado en el medio plazo. Por otra parte, el fuerte incremento de las corrientes de fuga de los transistores de silicio CMOS actuales, supone un enorme desafío para la integración de memorias SRAM. Asimismo, estas memorias son cada vez más susceptibles a fallos de lectura/escritura en diseños de bajo consumo. Como resultado de estos problemas, que se agravan con cada nueva generación tecnológica, en los últimos años se han intensificado los esfuerzos para desarrollar nuevas tecnologías que reemplacen o al menos complementen a las actuales. Los transistores de efecto campo eléctrico ferroso (FeFET en sus siglas en inglés) se consideran una de las alternativas más prometedores para sustituir tanto a Flash (por su mayor densidad) como a DRAM (por su mayor velocidad), pero aún está en una fase muy inicial de su desarrollo. Hay otras tecnologías algo más maduras, en el ámbito de las memorias RAM resistivas, entre las que cabe destacar ReRAM (o RRAM), STT-RAM, Domain Wall Memory y Phase Change Memory (PRAM)...Depto. de Arquitectura de Computadores y AutomáticaFac. de InformáticaTRUEunpu

Design, Manufacturing and Control of an Advanced High-Precision Robotic System for Microsurgery

Microsurgeries like ophthalmic surgery confront many challenges like limited workspace and hand motion, steady hand movements, manipulating delicate thin tissues, and holding the instrument in place for a long time. New developments in robotically-assisted surgery can highly benefits this field and facilitate those complicated surgeries. Robotic eye surgery can save time, reduce surgical complications and inspire more delicate surgical procedures that cannot be done currently by surgeon’s hands. In this thesis work, the requirements for ophthalmic surgeries were studied and based on that a robotic system with 6 DOF is proposed and designed. This robotic system is capable of handling the position and orientation of the surgical instrument with theoretical accuracy of 10 μm. The design features a remote center of motion that defines the point of entry into the eye or patient’s body. The forward and inverse kinematics equations and workspace analysis of the robot is also discussed and presented. Six miniature DC motors with their PID controllers were installed on robot arms in order to run 6 DOF systems. Therefore, the dynamic behavior of a DC motor was studied and modeled and then the position and velocity transfer functions were derived and used to study the behavior of the system and also to manually tune the PID controller. The function of different elements of the control system including encoder, controller modules, Controller Area Network (CAN) and the controller software were discussed as well. The graphical user interface called EPOS Studio and performs as the motion controller is introduced and the way it organizes communications among the elements of the control system was described

Gerência do consumo de energia dirigida pela aplicação em sistemas embarcados

Dissertação (mestrado) - Universidade Federal de Santa Catarina, Centro Tecnológico. Programa de Pós-Graduação em Ciência da Computação.Baixo consumo de energia é um dos principais requisitos no projeto de sistemas embarcados, principalmente quando estes são alimentados por baterias. Técnicas que têm sido aplicadas com eficácia em sistemas de computação genérica não têm atingido o mesmo êxito em sistemas embarcados, ou devido à falta de flexibilidade, ou devido aos requisitos para sua implantação (volumes de memória e processamento), que podem tornar proibitiva sua aplicação nestes dispositivos. Este trabalho define uma interface simples e uniforme para gerência de energia dirigida pela aplicação em sistemas embarcados. Esta interface disponibiliza ao programador da aplicação a flexibilidade de configurar os modos de operação de baixo consumo dos componentes em uso, conforme sua necessidade. A implementação buscou garantir a portabilidade desta aplicação a um baixo custo em termos de uso de memória e processamento. Este trabalho utiliza Redes de Petri Hierárquicas para especificar os procedimentos de troca de modos de operação dos componentes, utilizando os pontos de refinamento destas redes para representar as relações entre os diversos componentes do sistema. O uso das Redes de Petri permitiu analisar o mecanismo de gerência de energia para verificar seu funcionamento e a inexistência de impasses. A extensão da interface dos componentes e a inclusão dos procedimentos de troca de modo de operação foram implementadas como um aspecto. Um protótipo foi desenvolvido utilizando o sistema operacional Embedded Parallel Operating System (EPOS) e estudos de caso foram realizados para demonstrar a usabilidade desta interface

Design and Validation of Hardware-in-the-Loop Testbed for Proximity Operations Payloads

The research presented here is a new testbed design for CubeSat and payload testing and development. This research demonstrates a low-cost, hardware-in-the-loop testing apparatus for use with university CubeSat programs for testing throughout the different levels of the development process. The average university CubeSat program undergoes very little hardware-in-the-loop testing. Most of the focus is the targeted towards performance testing and environmental testing which occur after completion the development process. This research shows that, for minimal schedule and cost impact, testing can occur early in the development process. The testbed presented here demonstrates suitable accuracy to be used for advanced mission testing and regularly throughout the process until completion. The testbed maintains a low-cost, modular design, and ease of integration into new and existing programs. In addition, some modifications and upgraders are suggested to further increase the performance of the testbed. The success of the testbed can be seen through the implementation of actual satellite telemetry with rendezvous and docking missions, the testbed performance, and the results of that experiment

The Pierre Auger Observatory: Contributions to the 34th International Cosmic Ray Conference (ICRC 2015)

Contributions of the Pierre Auger Collaboration to the 34th International Cosmic Ray Conference, 30 July - 6 August 2015, The Hague, The NetherlandsComment: 24 proceedings, the 34th International Cosmic Ray Conference, 30 July - 6 August 2015, The Hague, The Netherlands; will appear in PoS(ICRC2015

Design and Control of Robotic Systems for Lower Limb Stroke Rehabilitation

Lower extremity stroke rehabilitation exhausts considerable health care resources, is labor intensive, and provides mostly qualitative metrics of patient recovery. To overcome these issues, robots can assist patients in physically manipulating their affected limb and measure the output motion. The robots that have been currently designed, however, provide assistance over a limited set of training motions, are not portable for in-home and in-clinic use, have high cost and may not provide sufficient safety or performance. This thesis proposes the idea of incorporating a mobile drive base into lower extremity rehabilitation robots to create a portable, inherently safe system that provides assistance over a wide range of training motions. A set of rehabilitative motion tasks were established and a six-degree-of-freedom (DOF) motion and force-sensing system was designed to meet high-power, large workspace, and affordability requirements. An admittance controller was implemented, and the feasibility of using this portable, low-cost system for movement assistance was shown through tests on a healthy individual. An improved version of the robot was then developed that added torque sensing and known joint elasticity for use in future clinical testing with a flexible-joint impedance controller

Development of a Wearable Mechatronic Elbow Brace for Postoperative Motion Rehabilitation

This thesis describes the development of a wearable mechatronic brace for upper limb rehabilitation that can be used at any stage of motion training after surgical reconstruction of brachial plexus nerves. The results of the mechanical design and the work completed towards finding the best torque transmission system are presented herein. As part of this mechatronic system, a customized control system was designed, tested and modified. The control strategy was improved by replacing a PID controller with a cascade controller. Although the experiments have shown that the proposed device can be successfully used for muscle training, further assessment of the device, with the help of data from the patients with brachial plexus injury (BPI), is required to improve the control strategy. Unique features of this device include the combination of adjustability and modularity, as well as the passive adjustment required to compensate for the carrying angle

Heurística para escalonamento multicore de tempo real visando determinismo temporal

TCC(graduação) - Universidade Federal de Santa Catarina. Centro Tecnológico. Ciências da Computação.Com a evolução dos chips do processador, o desempenho e o consumo de energia estão cada vez mais buscando melhorias. Essa otimização foi desenvolvida em hardware, aumentando o número de recursos disponíveis e em software, onde o objetivo é fazer o melhor uso desses recursos. Dentro do contexto de monitoramento de desempenho, várias pesquisas foram desenvolvidas para aprender sobre a execução através de canais de monitoramento fornecidos pela Unidade de Monitoramento de Desempenho (PMU) do processador. Neste trabalho, o foco é no desenvolvimento de uma heurística usando dados de desempenho monitorados através da PMU para aprender sobre padrões de desempenho e usar esse conhecimento para controlar o escalonamento dinâmico de voltagem e freqüência (DVFS), mantendo o determinismo temporal de tarefas críticas com alto uso da hierarquia de memória ou alto uso de recursão, enquanto é reduzido o consumo de energia dos núcleos de processador em até 15%

Design of an Elastic Actuation System for a Gait-Assistive Active Orthosis for Incomplete Spinal Cord Injured Subjects

A spinal cord injury severely reduces the quality of life of affected people. Following the injury, limitations of the ability to move may occur due to the disruption of the motor and sensory functions of the nervous system depending on the severity of the lesion. An active stance-control knee-ankle-foot orthosis was developed and tested in earlier works to aid incomplete SCI subjects by increasing their mobility and independence. This thesis aims at the incorporation of elastic actuation into the active orthosis to utilise advantages of the compliant system regarding efficiency and human-robot interaction as well as the reproduction of the phyisological compliance of the human joints. Therefore, a model-based procedure is adapted to the design of an elastic actuation system for a gait-assisitve active orthosis. A determination of the optimal structure and parameters is undertaken via optimisation of models representing compliant actuators with increasing level of detail. The minimisation of the energy calculated from the positive amount of power or from the absolute power of the actuator generating one human-like gait cycle yields an optimal series stiffness, which is similar to the physiological stiffness of the human knee during the stance phase. Including efficiency factors for components, especially the consideration of the electric model of an electric motor yields additional information. A human-like gait cycle contains high torque and low velocities in the stance phase and lower torque combined with high velocities during the swing. Hence, the efficiency of an electric motor with a gear unit is only high in one of the phases. This yields a conceptual design of a series elastic actuator with locking of the actuator position during the stance phase. The locked position combined with the series compliance allows a reproduction of the characteristics of the human gait cycle during the stance phase. Unlocking the actuator position for the swing phase enables the selection of an optimal gear ratio to maximise the recuperable energy. To evaluate the developed concept, a laboratory specimen based on an electric motor, a harmonic drive gearbox, a torsional series spring and an electromagnetic brake is designed and appropriate components are selected. A control strategy, based on impedance control, is investigated and extended with a finite state machine to activate the locking mechanism. The control scheme and the laboratory specimen are implemented at a test bench, modelling the foot and shank as a pendulum articulated at the knee. An identification of parameters yields high and nonlinear friction as a problem of the system, which reduces the energy efficiency of the system and requires appropriate compensation. A comparison between direct and elastic actuation shows similar results for both systems at the test bench, showing that the increased complexity due to the second degree of freedom and the elastic behaviour of the actuator is treated properly. The final proof of concept requires the implementation at the active orthosis to emulate uncertainties and variations occurring during the human gait