A mathematical formulation of the loop pipelining problem

This paper presents a mathematical model for the loop pipelining problem that considers several parameters for optimization and supports any combination of resource and timing constraints. The unrolling degree of the loop is one of the variables explored by the model. By using Farey’s series, an optimal exploration of the unrolling degree is performed and optimal solutions not considered by other methods are obtained. Finding an optimal schedule that minimizes resource and register requirements is solved by using an Integer linear programming (ILP) model. A novel paradigm called branch and prune is proposed to eficiently converge towards the optimal schedule and prune the search tree for integer solutions, thus drastically reducing the running time. This is the first formulation that combines the unrolling degree of the loop with timing and resource constraints in a mathematical model that guarantees optimal solutions.Peer ReviewedPostprint (author's final draft

Exploiting parallelism within multidimensional multirate digital signal processing systems

The intense requirements for high processing rates of multidimensional Digital Signal Processing systems in practical applications justify the Application Specific Integrated Circuits designs and parallel processing implementations. In this dissertation, we propose novel theories, methodologies and architectures in designing high-performance VLSI implementations for general multidimensional multirate Digital Signal Processing systems by exploiting the parallelism within those applications. To systematically exploit the parallelism within the multidimensional multirate DSP algorithms, we develop novel transformations including (1) nonlinear I/O data space transforms, (2) intercalation transforms, and (3) multidimensional multirate unfolding transforms. These transformations are applied to the algorithms leading to systematic methodologies in high-performance architectural designs. With the novel design methodologies, we develop several architectures with parallel and distributed processing features for implementing multidimensional multirate applications. Experimental results have shown that those architectures are much more efficient in terms of execution time and/or hardware cost compared with existing hardware implementations

Loop pipelining with resource and timing constraints

Developing efficient programs for many of the current parallel computers is not easy due to the architectural complexity of those machines. The wide variety of machine organizations often makes it more difficult to port an existing program than to reprogram it completely. Therefore, powerful translators are necessary to generate effective code and free the programmer from concerns about the specific characteristics of the target machine. This work focuses on techniques to be used by an important class of translators, whose objective is to transform sequential programs into equivalent more parallel programs. The transformations are performed at instruction level in order to exploit low level parallelism and increase memory locality.Most of the current applications are programmed in languages which do not allow us to express parallelism between high-level sentences (as Pascal, C or Fortran). Furthermore, a lot of applications written ten or more years ago are still used today, and it is not feasible to rewrite such applications for many reasons (not only technical reasons, but also economic ones). Translators enable programmers to write the application in a familiar sequential programming language, without concerning their selves with the architecture of the target machine. Current compilers for parallel architectures not only translate a program written on a high-level language to the appropriate machine language, but also perform some transformations in the final code in order to execute the program in a more parallel way. The transformations improve the performance in the execution of the program by making use of the knowledge that the compiler has about the machine architecture. The semantics of the program remain intact after any transformation.Experiments show that limiting parallelization to basic blocks not included in loops limits maximum speedup. This is because loops often comprise a large portion of the parallelism available to be exploited in a program. For this reason, a lot of effort has been devoted in the recent years to parallelize loop execution. Several parallel computer architectures and compilation techniques have been proposed to exploit such a parallelism at different granularities. Multiprocessors exploit coarse grained parallelism by distributing entire loop iterations to different processors. Systems oriented to the high-level synthesis (HLS) of VLSI circuits, superscalar processors and very long instruction word (VLIW) processors exploit fine-grained parallelism at instruction level. This work addresses fine-grained parallelization of loops addressed to the HLS of VLSI circuits. Two algorithms are proposed for resource constraints and for timing constraints. An algorithm to reduce the number of registers required to execute a loop in a given architecture is also proposed

Instrumentation of CdZnTe detectors for measuring prompt gamma-rays emitted during particle therapy

Background: The irradiation of cancer patients with charged particles, mainly protons and carbon ions, has become an established method for the treatment of specific types of tumors. In comparison with the use of X-rays or gamma-rays, particle therapy has the advantage that the dose distribution in the patient can be precisely controlled. Tissue or organs lying near the tumor will be spared. A verification of the treatment plan with the actual dose deposition by means of a measurement can be done through range assessment of the particle beam. For this purpose, prompt gamma-rays are detected, which are emitted by the affected target volume during irradiation. Motivation: The detection of prompt gamma-rays is a task related to radiation detection and measurement. Nuclear applications in medicine can be found in particular for in vivo diagnosis. In that respect the spatially resolved measurement of gamma-rays is an essential technique for nuclear imaging, however, technical requirements of radiation measurement during particle therapy are much more challenging than those of classical applications. For this purpose, appropriate instruments beyond the state-of-the-art need to be developed and tested for detecting prompt gamma-rays. Hence the success of a method for range assessment of particle beams is largely determined by the implementation of electronics. In practice, this means that a suitable detector material with adapted readout electronics, signal and information processing, and data interface must be utilized to solve the challenges. Thus, the parameters of the system (e.g. segmentation, time or energy resolution) can be optimized depending on the method (e.g. slit camera, time-of-flight measurement or Compton camera). Regardless of the method, the detector system must have a high count rate capability and a large measuring range (>7 MeV). For a subsequent evaluation of a suitable method for imaging, the mentioned parameters may not be restricted by the electronics. Digital signal processing is predestined for multipurpose tasks, and, in terms of the demands made, the performance of such an implementation has to be determined. Materials and methods: In this study, the instrumentation of a detector system for prompt gamma-rays emitted during particle therapy is limited to the use of a cadmium zinc telluride (CdZnTe, CZT) semiconductor detector. The detector crystal is divided into an 8x8 pixel array by segmented electrodes. Analog and digital signal processing are exemplarily tested with this type of detector and aims for application of a Compton camera to range assessment. The electronics are implemented with commercial off-the-shelf (COTS) components. If applicable, functional units of the detector system were digitalized and implemented in a field-programmable gate array (FPGA). An efficient implementation of the algorithms in terms of timing and logic utilization is fundamental to the design of digital circuits. The measurement system is characterized with radioactive sources to determine the measurement dynamic range and resolution. Finally, the performance is examined in terms of the requirements of particle therapy with experiments at particle accelerators. Results: A detector system based on a CZT pixel detector has been developed and tested. Although the use of an application-specific integrated circuit is convenient, this approach was rejected because there was no circuit available which met the requirements. Instead, a multichannel, compact, and low-noise analog amplifier circuit with COTS components has been implemented. Finally, the 65 information channels of a detector are digitized, processed and visualized. An advanced digital signal processing transforms the traditional approaches of nuclear electronics in algorithms and digital filter structures for an FPGA. With regard to the characteristic signals (e.g. varying rise times, depth-dependent energy measurement) of a CZT pixel detector, it could be shown that digital pulse processing results in a very good energy resolution (~2% FWHM at 511 keV), as well as permits a time measurement in the range of some tens of nanoseconds. Furthermore, the experimental results have shown that the dynamic range of the detector system could be significantly improved compared to the existing prototype of the Compton camera (~10 keV..7 MeV). Even count rates of ~100 kcps in a high-energy beam could be ultimately processed with the CZT pixel detector. But this is merely a limit of the detector due to its volume, and not related to electronics. In addition, the versatility of digital signal processing has been demonstrated with other detector materials (e.g. CeBr3). With foresight on high data throughput in a distributed data acquisition from multiple detectors, a Gigabit Ethernet link has been implemented as data interface. Conclusions: To fully exploit the capabilities of a CZT pixel detector, a digital signal processing is absolutely necessary. A decisive advantage of the digital approach is the ease of use in a multichannel system. Thus with digitalization, a necessary step has been done to master the complexity of a Compton camera. Furthermore, the benchmark of technology shows that a CZT pixel detector withstands the requirements of measuring prompt gamma-rays during particle therapy. The previously used orthogonal strip detector must be replaced by the pixel detector in favor of increased efficiency and improved energy resolution. With the integration of the developed digital detector system into a Compton camera, it must be ultimately proven whether this method is applicable for range assessment in particle therapy. Even if another method is more convenient in a clinical environment due to practical considerations, the detector system of that method may benefit from the shown instrumentation of a digital signal processing system for nuclear applications.:1. Introduction 1.1. Aim of this work 2. Analog front-end electronics 2.1. State-of-the-art 2.2. Basic design considerations 2.2.1. CZT detector assembly 2.2.2. Electrical characteristics of a CZT pixel detector 2.2.3. High voltage biasing and grounding 2.2.4. Signal formation in CZT detectors 2.2.5. Readout concepts 2.2.6. Operational amplifier 2.3. Circuit design of a charge-sensitive amplifier 2.3.1. Circuit analysis 2.3.2. Charge-to-voltage transfer function 2.3.3. Input coupling of the CSA 2.3.4. Noise 2.4. Implementation and Test 2.5. Results 2.5.1. Test pulse input 2.5.2. Pixel detector 2.6. Conclusion 3. Digital signal processing 3.1. Unfolding-synthesis technique 3.2. Digital deconvolution 3.2.1. Prior work 3.2.2. Discrete-time inverse amplifier transfer function 3.2.3. Application to measured signals 3.2.4. Implementation of a higher order IIR filter 3.2.5. Conclusion 3.3. Digital pulse synthesis 3.3.1. Prior work 3.3.2. FIR filter structures for FPGAs 3.3.3. Optimized fixed-point arithmetic 3.3.4. Conclusion 4. Data interface 4.1. State-of-the-art 4.2. Embedded Gigabit Ethernet protocol stack 4.3. Implementation 4.3.1. System overview 4.3.2. Media Access Control 4.3.3. Embedded protocol stack 4.3.4. Clock synchronization 4.4. Measurements and results 4.4.1. Throughput performance 4.4.2. Synchronization 4.4.3. Resource utilization 4.5. Conclusion 5. Experimental results 5.1. Digital pulse shapers 5.1.1. Spectroscopy application 5.1.2. Timing applications 5.2. Gamma-ray spectroscopy 5.2.1. Energy resolution of scintillation detectors 5.2.2. Energy resolution of a CZT pixel detector 5.3. Gamma-ray timing 5.3.1. Timing performance of scintillation detectors 5.3.2. Timing performance of CZT pixel detectors 5.4. Measurements with a particle beam 5.4.1. Bremsstrahlung Facility at ELBE 6. Discussion 7. Summary 8. ZusammenfassungHintergrund: Die Bestrahlung von Krebspatienten mit geladenen Teilchen, vor allem Protonen oder Kohlenstoffionen, ist mittlerweile eine etablierte Methode zur Behandlung von speziellen Tumorarten. Im Vergleich mit der Anwendung von Röntgen- oder Gammastrahlen hat die Teilchentherapie den Vorteil, dass die Dosisverteilung im Patienten präziser gesteuert werden kann. Dadurch werden um den Tumor liegendes Gewebe oder Organe geschont. Die messtechnische Verifikation des Bestrahlungsplans mit der tatsächlichen Dosisdeposition kann über eine Reichweitenkontrolle des Teilchenstrahls erfolgen. Für diesen Zweck werden prompte Gammastrahlen detektiert, die während der Bestrahlung vom getroffenen Zielvolumen emittiert werden. Fragestellung: Die Detektion von prompten Gammastrahlen ist eine Aufgabenstellung der Strahlenmesstechnik. Strahlenanwendungen in der Medizintechnik finden sich insbesondere in der in-vivo Diagnostik. Dabei ist die räumlich aufgelöste Messung von Gammastrahlen bereits zentraler Bestandteil der nuklearmedizinischen Bildgebung, jedoch sind die technischen Anforderungen der Strahlendetektion während der Teilchentherapie im Vergleich mit klassischen Anwendungen weitaus anspruchsvoller. Über den Stand der Technik hinaus müssen für diesen Zweck geeignete Instrumente zur Erfassung der prompten Gammastrahlen entwickelt und erprobt werden. Die elektrotechnische Realisierung bestimmt maßgeblich den Erfolg eines Verfahrens zur Reichweitenkontrolle von Teilchenstrahlen. Konkret bedeutet dies, dass ein geeignetes Detektormaterial mit angepasster Ausleseelektronik, Signal- und Informationsverarbeitung sowie Datenschnittstelle zur Problemlösung eingesetzt werden muss. Damit können die Parameter des Systems (z. B. Segmentierung, Zeit- oder Energieauflösung) in Abhängigkeit der Methode (z.B. Schlitzkamera, Flugzeitmessung oder Compton-Kamera) optimiert werden. Unabhängig vom Verfahren muss das Detektorsystem eine hohe Ratenfestigkeit und einen großen Messbereich (>7 MeV) besitzen. Für die anschließende Evaluierung eines geeigneten Verfahrens zur Bildgebung dürfen die genannten Parameter durch die Elektronik nicht eingeschränkt werden. Eine digitale Signalverarbeitung ist für universelle Aufgaben prädestiniert und die Leistungsfähigkeit einer solchen Implementierung soll hinsichtlich der gestellten Anforderungen bestimmt werden. Material und Methode: Die Instrumentierung eines Detektorsystems für prompte Gammastrahlen beschränkt sich in dieser Arbeit auf die Anwendung eines Cadmiumzinktellurid (CdZnTe, CZT) Halbleiterdetektors. Der Detektorkristall ist durch segmentierte Elektroden in ein 8x8 Pixelarray geteilt. Die analoge und digitale Signalverarbeitung wird beispielhaft mit diesem Detektortyp erprobt und zielt auf die Anwendung zur Reichweitenkontrolle mit einer Compton-Kamera. Die Elektronik wird mit seriengefertigten integrierten Schaltkreisen umgesetzt. Soweit möglich, werden die Funktionseinheiten des Detektorsystems digitalisiert und in einem field-programmable gate array (FPGA) implementiert. Eine effiziente Umsetzung der Algorithmen in Bezug auf Zeitverhalten und Logikverbrauch ist grundlegend für den Entwurf der digitalen Schaltungen. Das Messsystem wird mit radioaktiven Prüfstrahlern hinsichtlich Messbereichsdynamik und Auflösung charakterisiert. Schließlich wird die Leistungsfähigkeit hinsichtlich der Anforderungen der Teilchentherapie mit Experimenten am Teilchenbeschleuniger untersucht. Ergebnisse: Es wurde ein Detektorsystem auf Basis von CZT Pixeldetektoren entwickelt und erprobt. Obwohl der Einsatz einer anwendungsspezifischen integrierten Schaltung zweckmäßig wäre, wurde dieser Ansatz zurückgewiesen, da kein verfügbarer Schaltkreis die Anforderungen erfüllte. Stattdessen wurde eine vielkanalige, kompakte und rauscharme analoge Verstärkerschaltung mit seriengefertigten integrierten Schaltkreisen aufgebaut. Letztendlich werden die 65 Informationskanäle eines Detektors digitalisiert, verarbeitet und visualisiert. Eine fortschrittliche digitale Signalverarbeitung überführt die traditionellen Ansätze der Nuklearelektronik in Algorithmen und digitale Filterstrukturen für einen FPGA. Es konnte gezeigt werden, dass die digitale Pulsverarbeitung in Bezug auf die charakteristischen Signale (u.a. variierende Anstiegszeiten, tiefenabhängige Energiemessung) eines CZT Pixeldetektors eine sehr gute Energieauflösung (~2% FWHM at 511 keV) sowie eine Zeitmessung im Bereich von einigen 10 ns ermöglicht. Weiterhin haben die experimentellen Ergebnisse gezeigt, dass der Dynamikbereich des Detektorsystems im Vergleich zum bestehenden Prototyp der Compton-Kamera deutlich verbessert werden konnte (~10 keV..7 MeV). Nach allem konnten auch Zählraten von >100 kcps in einem hochenergetischen Strahl mit dem CZT Pixeldetektor verarbeitet werden. Dies stellt aber lediglich eine Begrenzung des Detektors aufgrund seines Volumens, nicht jedoch der Elektronik, dar. Zudem wurde die Vielseitigkeit der digitalen Signalverarbeitung auch mit anderen Detektormaterialen (u.a. CeBr3) demonstriert. Mit Voraussicht auf einen hohen Datendurchsatz in einer verteilten Datenerfassung von mehreren Detektoren, wurde als Datenschnittstelle eine Gigabit Ethernet Verbindung implementiert. Schlussfolgerung: Um die Leistungsfähigkeit eines CZT Pixeldetektors vollständig auszunutzen, ist eine digitale Signalverarbeitung zwingend notwendig. Ein entscheidender Vorteil des digitalen Ansatzes ist die einfache Handhabbarkeit in einem vielkanaligen System. Mit der Digitalisierung wurde ein notwendiger Schritt getan, um die Komplexität einer Compton-Kamera beherrschbar zu machen. Weiterhin zeigt die Technologiebewertung, dass ein CZT Pixeldetektor den Anforderungen der Teilchentherapie für die Messung prompter Gammastrahlen stand hält. Der bisher eingesetzte Streifendetektor muss zugunsten einer gesteigerten Effizienz und verbesserter Energieauflösung durch den Pixeldetektor ersetzt werden. Mit der Integration des entwickelten digitalen Detektorsystems in eine Compton-Kamera muss abschließend geprüft werden, ob dieses Verfahren für die Reichweitenkontrolle in der Teilchentherapie anwendbar ist. Auch wenn sich herausstellt, dass ein anderes Verfahren unter klinischen Bedingungen praktikabler ist, so kann auch dieses Detektorsystem von der gezeigten Instrumentierung eines digitalen Signalverarbeitungssystems profitieren.:1. Introduction 1.1. Aim of this work 2. Analog front-end electronics 2.1. State-of-the-art 2.2. Basic design considerations 2.2.1. CZT detector assembly 2.2.2. Electrical characteristics of a CZT pixel detector 2.2.3. High voltage biasing and grounding 2.2.4. Signal formation in CZT detectors 2.2.5. Readout concepts 2.2.6. Operational amplifier 2.3. Circuit design of a charge-sensitive amplifier 2.3.1. Circuit analysis 2.3.2. Charge-to-voltage transfer function 2.3.3. Input coupling of the CSA 2.3.4. Noise 2.4. Implementation and Test 2.5. Results 2.5.1. Test pulse input 2.5.2. Pixel detector 2.6. Conclusion 3. Digital signal processing 3.1. Unfolding-synthesis technique 3.2. Digital deconvolution 3.2.1. Prior work 3.2.2. Discrete-time inverse amplifier transfer function 3.2.3. Application to measured signals 3.2.4. Implementation of a higher order IIR filter 3.2.5. Conclusion 3.3. Digital pulse synthesis 3.3.1. Prior work 3.3.2. FIR filter structures for FPGAs 3.3.3. Optimized fixed-point arithmetic 3.3.4. Conclusion 4. Data interface 4.1. State-of-the-art 4.2. Embedded Gigabit Ethernet protocol stack 4.3. Implementation 4.3.1. System overview 4.3.2. Media Access Control 4.3.3. Embedded protocol stack 4.3.4. Clock synchronization 4.4. Measurements and results 4.4.1. Throughput performance 4.4.2. Synchronization 4.4.3. Resource utilization 4.5. Conclusion 5. Experimental results 5.1. Digital pulse shapers 5.1.1. Spectroscopy application 5.1.2. Timing applications 5.2. Gamma-ray spectroscopy 5.2.1. Energy resolution of scintillation detectors 5.2.2. Energy resolution of a CZT pixel detector 5.3. Gamma-ray timing 5.3.1. Timing performance of scintillation detectors 5.3.2. Timing performance of CZT pixel detectors 5.4. Measurements with a particle beam 5.4.1. Bremsstrahlung Facility at ELBE 6. Discussion 7. Summary 8. Zusammenfassun

FPGA Implementation of Data Flow Graphs for Digital Signal Processing Applications

A rapid growth in digital signal processing applications has increased the requirement for high-speed digital systems. Multiprocessor systems are the best choice for these applications. A prior sequence of operations should be applied to the operations that described the nature of these applications before hardware implementation is produced. These operations should be scheduled and hardware allocated. This paper proposes a new scheduling technique for digital signal processing (DSP) applications has been represented by data flow graphs (DFGs). In addition, hardware allocation is implemented in the form of embedded system. A proposed scheduling technique also achieves the optimal scheduling of a DFG at design time. The optimality criteria considered in this algorithm are the maximum throughput within the available hardware resources. The maximum throughput is achieved by arranging the DFG nodes according to their inter-related data dependencies. Then, two nodes can be clustered into one compound task to reduce the overall execution time by minimizing the number of tasks to be executed that minimizing the number of cycles to execute them. Then each task is presented in form of instruction to be executed in the hardware system. A hardware system is composed of one or multiple homogenous pipelined processing elements and it is designed to meet the maximum-rate schedule.  Two implementations are proposed of the system architecture according to the number of the processing elements, namely:  the serial system and the parallel system. The serial system comprises one processing element where all tasks are processed sequentially, whilst the parallel system has four processing elements to execute tasks concurrently. These systems consist mainly of seven units: central shared memory, state table, multiway function unit buffer, execution array, processing element/s, instruction buffer and the address generation unit. The hardware components were built on an FPGA chip using Verilog HDL. In synthesis results, the parallel system has better system performance by 25.5% than the serial system. While the serial system requires smaller area size, which described by the number of slice registers and the number of the slice lookup tables (LUTs) than the parallel one. The relationship between the number of instructions that are executed in both systems, and the system area and the system performance that presented by system frequency, are studied. By increasing memories size in both systems, the system performance isn’t affected as in a serial system, and it is slightly decreased as the parallel system by 1.5% to 4.5%. In terms of the systems area, both serial system area and parallel system area are increased and in some cases are doubled. The proposed scheduling technique is shown to outperform the retaining technique, which we have chosen to compare with.  The serial system has better performance by 19.3% higher system frequency than a retiming technique. And the parallel system also outperforms the retaining technique by 51.2% higher system frequency in synthesis results