70,855 research outputs found

    An RF-input outphasing power amplifier with RF signal decomposition network

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    This work presents an outphasing power amplifier that directly amplifies a modulated RF input. The approach eliminates the need for multiple costly IQ modulators and baseband signal component separation found in conventional outphasing power amplifier systems, which have previously required both an RF carrier input and a separate baseband input to synthesize a modulated RF output. A novel RF signal decomposition network enables direct RF-input / RF-output outphasing by directly synthesizing the phase- and amplitude-modulated RF signals that drive the branch PAs from the modulated RF input waveform. The technique is demonstrated at 2.14 GHz in a four-way lossless outphasing amplifier system with transmission-line-based power combiner. The resulting proof-of-concept outphasing power amplifier has a peak CW output power of 95 W, and peak drain efficiency of 72%

    Theory and Implementation of RF-Input Outphasing Power Amplification

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    Conventional outphasing power amplifier systems require both a radio frequency (RF) carrier input and a separate baseband input to synthesize a modulated RF output. This work presents an RF-input/RF-output outphasing power amplifier that directly amplifies a modulated RF input, eliminating the need for multiple costly IQ modulators and baseband signal component separation as in previous outphasing systems. An RF signal decomposition network directly synthesizes the phase- and amplitude-modulated signals used to drive the branch power amplifiers (PAs). With this approach, a modulated RF signal including zero-crossings can be applied to the single RF input port of the outphasing RF amplifier system. The proposed technique is demonstrated at 2.14 GHz in a four-way lossless outphasing amplifier with transmission-line power combiner. The RF decomposition network is implemented using a transmission-line resistance compression network with nonlinear loads designed to provide the necessary amplitude and phase decomposition. The resulting proof-of-concept outphasing power amplifier has a peak CW output power of 93 W, peak drain efficiency of 70%, and performance on par with a previously-demonstrated outphasing and power combining system requiring four IQ modulators and a digital signal component separator

    RF Power Amplifier

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    Wireless devices are part of everyday life, cellphones and radio receivers impact more people than any piece of technology. Thus, the respective building blocks continue to advance and achieve better performance. A primary component of all wireless communication systems is the power amplifier that drives the antenna. The Institute of Electrical and Electronics Engineers (IEEE) holds the International Microwave Symposium (IMS) every year where teams compete internationally for the most efficient RF Power Amplifier (PA). Power amplifier technologies strive to maximize efficiency and linearity. Topologies to consider are D, E, F, F-1 and Doherty since they have a maximum theoretical efficiency of 100%. This project focuses on the design and simulation of a power amplifier in which design is optimized for Power Added Efficiency (PAE) at 3.5GHz using the class F topology and it will use IMS competition rules and performance metrics. Power conversion efficiency from DC to RF is referred to as PAE and linearity is the maximum spur to fundamental power ratio. An ideal class F amplifier creates a square output drain voltage and a half wave rectified sinusoidal current in order to maximize efficiency. For this project, a 3.5GHz GaN HEMT based power amplifier is designed and simulated in Keysight Advanced Design System (ADS) and Momentum [1]. Load-pull simulation, including the transistor model, sweeps the load impedance to find the optimal load for maximized efficiency or power output. An input and output microstrip stub network can be designed to match these ideal impedances to a 50Ω line. Momentum, an ADS integrated EM simulation software, is used to verify actual input and output network performance. Finally, in order to find overall system gain, power output, and efficiency, a harmonic balance simulation is performed. Project goals include class F amplifier topology harmonic balance and Momentum EM simulation to attain a minimum 80% PAE and 40dBm (10W) output power at 27dBm maximum input power (0.5W)

    Characterization of a 30-GHz IMPATT solid state amplifier

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    Described are the characterization and testing of a 20 W solid state amplifier operating in the Ka band to be used in low cost experimental ground terminals. The amplifier was developed by the TRW Electronic Systems Group under NASA Contract NAS3-23266 as a proof-of-concept (POC) device in support of the Advanced Communications Technology Satellite (ACTS) program. Additional goals were development of high-power IMPATT devices and circulators, and multistage diode circuits, which are an integral part of the amplifier. The amplifier underwent acceptance testing at the NASA Lewis Research Center, Cleveland, Ohio. Characteristics measured include the output power of 42 dB m, gain of 30 dB, an injection-locking RF bandwidth of 260 MHz, and an overall direct current-to-radiofrequency (dc-to-RF) efficiency of 6.7 percent

    Design of an RF CMOS Power Amplifier for Wireless Sensor Networks

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    The Power Amplifier (PA) is the last Radio Frequency (RF) building block in a transmitter, directly driving an antenna. The low power RF input signal of the PA is amplified to a significant power RF output signal by converting DC power into RF power. Since the PA consumes a majority of the power, efficiency plays one of the most important roles in a PA design. Designing an efficient, fully integrated RF PA that can operate at low supply voltage (1.2V), low power, and low RF frequency (433MHz) is a major challenge. The class E Power Amplifier, which is one type of switch mode PA, is preferred in such a scenario because of its higher theoretical efficiency compared to linear power amplifiers. A controllable class E RF power amplifier design implemented in 0.13 µm CMOS process is presented. The circuit was designed, simulated, laid out, fabricated, and tested. The PA will be integrated as a part of a complete wireless transceiver system using the same process

    High stability amplifier

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    An electrical RF signal amplifier for providing high temperature stability and RF isolation and comprised of an integrated circuit voltage regulator, a single transistor, and an integrated circuit operational amplifier mounted on a circuit board such that passive circuit elements are located on side of the circuit board while the active circuit elements are located on the other side is described. The active circuit elements are embedded in a common heat sink so that a common temperature reference is provided for changes in ambient temperature. The single transistor and operational amplifier are connected together to form a feedback amplifier powered from the voltage regulator with transistor implementing primarily the desired signal gain while the operational amplifier implements signal isolation. Further RF isolation is provided by the voltage regulator which inhibits cross-talk from other like amplifiers powered from a common power supply. Input and output terminals consisting of coaxial connectors are located on the sides of a housing in which all the circuit components and heat sink are located

    The design of a linear L-band high power amplifier for mobile communication satellites

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    A linear L-band solid state high power amplifier designed for the space segment of the Mobile Satellite (MSAT) mobile communication system is described. The amplifier is capable of producing 35 watts of RF power with multitone signal at an efficiency of 25 percent and with intermodulation products better than 16 dB below carrier

    Continuous-time adaptive control applied to rf amplifier linearization

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    A new approach to the RF power amplifier linearization problem is presented. The proposed solution applies non-linear theories (Lyapunov direct method) to adaptive filtering in order to improve the linearity of the RF amplifiers. The obtained design requires lower circuit complexity than the LINC amplifier, and is not based on iterative algorithms nor sub-system identification. Up to 100 MHz these functions could be implemented, at present, with operational amplifiers and integrated analog multipliers (four quadrants). The adjusting algorithm convergence or the interruption of the communication are not problems in the proposed adaptive solution. The canceller structure design is based on model reference adaptive systems (MRAS): to cancel the error between the plant output (distortion output of the RF amplifier) and reference model (the desired signal obtained from a linear and low-power amplifier) by using continuous-time techniques. The proposed structure is studied by computer simulation (SPICE program) in a class-A RF power amplifier, The behaviour of the adapted amplifier is studied when power transistors approach nonlinear operating zones (saturation state).Peer ReviewedPostprint (published version

    IC Ku-band Impatt Amplifier

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    High efficiency GaAs low-high-low IMPATTs were investigated. Theoretical analyses were employed to establish a design window for the material parameters to maximize microwave performance. Single mesa devices yielded typically 2 to 3 W with 16 to 23% efficiency in waveguide oscillator test circuits. IMPATTs with high reliability Pt/TiW/Pt/Au metallizations were subjected to temperature stress, non-rf bias-temperature stress, and rf bias-temperature stress. Assuming that temperature is the driving force behind the dominant failure mechanism, a mean-time-to-failure considerably greater than 500,000 hours is indicated by the stress tests. A 15 GHz, 4W, 56 dB gain microstrip amplifier was realized using GaAs FETs and IMPATTs. Power combining using a 3 db Lange coupler is employed in the power output stage having an intrinsic power-added efficiency of 15.7%. Overall dc-to-rf efficiency of the amplifier is 10.8%. The amplifier has greater than a 250 MHz, 1 db bandwidth; operates over the 0 deg to 50 C (base plate) temperature range with less than 0.5 db change in the power output; weighs 444 grams; and has a volume of 220 cu cm

    The 30-GHz monolithic receive module

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    Key requirements for a 30 GHz GaAs monolithic receive module for spaceborne communication antenna feed array applications include an overall receive module noise figure of 5 dB, a 30 dB RF to IF gain with six levels of intermediate gain control, a five-bit phase shifter, and a maximum power consumption of 250 mW. The RF designs for each of the four submodules (low noise amplifier, some gain control, phase shifter, and RF to IF sub-module) are presented. Except for the phase shifter, high frequency, low noise FETs with sub-half micron gate lengths are employed in the submodules. For the gain control, a two stage dual gate FET amplifier is used. The phase shifter is of the passive switched line type and consists of 5-bits. It uses relatively large gate width FETs (with zero drain to source bias) as the switching elements. A 20 GHz local oscillator buffer amplifier, a FET compatible balanced mixer, and a 5-8 GHz IF amplifier constitute the RF/IF sub-module. Phase shifter fabrication using ion implantation and a self-aligned gate technique is described. Preliminary RF results obtained on such phase shifters are included
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