178 research outputs found
Low-Floor Tanner Codes via Hamming-Node or RSCC-Node Doping
We study the design of structured Tanner codes with low error-rate floors on the AWGN channel. The design technique involves the “doping” of standard LDPC (proto-)graphs, by which we mean Hamming or recursive systematic convolutional (RSC) code constraints are used together with single-parity-check (SPC) constraints to construct a code’s protograph. We show that the doping of a “good” graph with Hamming or RSC codes is a pragmatic approach that frequently results in a code with a good threshold and very low error-rate floor. We focus on low-rate Tanner codes, in part because the design of low-rate, low-floor LDPC codes is particularly difficult. Lastly, we perform a simple complexity analysis of our Tanner codes and examine the performance of lower-complexity, suboptimal Hamming-node decoders
Design of Finite-Length Irregular Protograph Codes with Low Error Floors over the Binary-Input AWGN Channel Using Cyclic Liftings
We propose a technique to design finite-length irregular low-density
parity-check (LDPC) codes over the binary-input additive white Gaussian noise
(AWGN) channel with good performance in both the waterfall and the error floor
region. The design process starts from a protograph which embodies a desirable
degree distribution. This protograph is then lifted cyclically to a certain
block length of interest. The lift is designed carefully to satisfy a certain
approximate cycle extrinsic message degree (ACE) spectrum. The target ACE
spectrum is one with extremal properties, implying a good error floor
performance for the designed code. The proposed construction results in
quasi-cyclic codes which are attractive in practice due to simple encoder and
decoder implementation. Simulation results are provided to demonstrate the
effectiveness of the proposed construction in comparison with similar existing
constructions.Comment: Submitted to IEEE Trans. Communication
Quantum Error Correction beyond the Bounded Distance Decoding Limit
In this paper, we consider quantum error correction over depolarizing
channels with non-binary low-density parity-check codes defined over Galois
field of size . The proposed quantum error correcting codes are based on
the binary quasi-cyclic CSS (Calderbank, Shor and Steane) codes. The resulting
quantum codes outperform the best known quantum codes and surpass the
performance limit of the bounded distance decoder. By increasing the size of
the underlying Galois field, i.e., , the error floors are considerably
improved.Comment: To appear in IEEE Transactions on Information Theor
Low-Density Parity-Check Codes From Transversal Designs With Improved Stopping Set Distributions
This paper examines the construction of low-density parity-check (LDPC) codes
from transversal designs based on sets of mutually orthogonal Latin squares
(MOLS). By transferring the concept of configurations in combinatorial designs
to the level of Latin squares, we thoroughly investigate the occurrence and
avoidance of stopping sets for the arising codes. Stopping sets are known to
determine the decoding performance over the binary erasure channel and should
be avoided for small sizes. Based on large sets of simple-structured MOLS, we
derive powerful constraints for the choice of suitable subsets, leading to
improved stopping set distributions for the corresponding codes. We focus on
LDPC codes with column weight 4, but the results are also applicable for the
construction of codes with higher column weights. Finally, we show that a
subclass of the presented codes has quasi-cyclic structure which allows
low-complexity encoding.Comment: 11 pages; to appear in "IEEE Transactions on Communications
Check-hybrid GLDPC Codes: Systematic Elimination of Trapping Sets and Guaranteed Error Correction Capability
In this paper, we propose a new approach to construct a class of check-hybrid
generalized low-density parity-check (CH-GLDPC) codes which are free of small
trapping sets. The approach is based on converting some selected check nodes
involving a trapping set into super checks corresponding to a 2-error
correcting component code. Specifically, we follow two main purposes to
construct the check-hybrid codes; first, based on the knowledge of the trapping
sets of the global LDPC code, single parity checks are replaced by super checks
to disable the trapping sets. We show that by converting specified single check
nodes, denoted as critical checks, to super checks in a trapping set, the
parallel bit flipping (PBF) decoder corrects the errors on a trapping set and
hence eliminates the trapping set. The second purpose is to minimize the rate
loss caused by replacing the super checks through finding the minimum number of
such critical checks. We also present an algorithm to find critical checks in a
trapping set of column-weight 3 LDPC code and then provide upper bounds on the
minimum number of such critical checks such that the decoder corrects all error
patterns on elementary trapping sets. Moreover, we provide a fixed set for a
class of constructed check-hybrid codes. The guaranteed error correction
capability of the CH-GLDPC codes is also studied. We show that a CH-GLDPC code
in which each variable node is connected to 2 super checks corresponding to a
2-error correcting component code corrects up to 5 errors. The results are also
extended to column-weight 4 LDPC codes. Finally, we investigate the eliminating
of trapping sets of a column-weight 3 LDPC code using the Gallager B decoding
algorithm and generalize the results obtained for the PBF for the Gallager B
decoding algorithm
Hierarchical and High-Girth QC LDPC Codes
We present a general approach to designing capacity-approaching high-girth
low-density parity-check (LDPC) codes that are friendly to hardware
implementation. Our methodology starts by defining a new class of
"hierarchical" quasi-cyclic (HQC) LDPC codes that generalizes the structure of
quasi-cyclic (QC) LDPC codes. Whereas the parity check matrices of QC LDPC
codes are composed of circulant sub-matrices, those of HQC LDPC codes are
composed of a hierarchy of circulant sub-matrices that are in turn constructed
from circulant sub-matrices, and so on, through some number of levels. We show
how to map any class of codes defined using a protograph into a family of HQC
LDPC codes. Next, we present a girth-maximizing algorithm that optimizes the
degrees of freedom within the family of codes to yield a high-girth HQC LDPC
code. Finally, we discuss how certain characteristics of a code protograph will
lead to inevitable short cycles, and show that these short cycles can be
eliminated using a "squashing" procedure that results in a high-girth QC LDPC
code, although not a hierarchical one. We illustrate our approach with designed
examples of girth-10 QC LDPC codes obtained from protographs of one-sided
spatially-coupled codes.Comment: Submitted to IEEE Transactions on Information THeor
An Iteratively Decodable Tensor Product Code with Application to Data Storage
The error pattern correcting code (EPCC) can be constructed to provide a
syndrome decoding table targeting the dominant error events of an inter-symbol
interference channel at the output of the Viterbi detector. For the size of the
syndrome table to be manageable and the list of possible error events to be
reasonable in size, the codeword length of EPCC needs to be short enough.
However, the rate of such a short length code will be too low for hard drive
applications. To accommodate the required large redundancy, it is possible to
record only a highly compressed function of the parity bits of EPCC's tensor
product with a symbol correcting code. In this paper, we show that the proposed
tensor error-pattern correcting code (T-EPCC) is linear time encodable and also
devise a low-complexity soft iterative decoding algorithm for EPCC's tensor
product with q-ary LDPC (T-EPCC-qLDPC). Simulation results show that
T-EPCC-qLDPC achieves almost similar performance to single-level qLDPC with a
1/2 KB sector at 50% reduction in decoding complexity. Moreover, 1 KB
T-EPCC-qLDPC surpasses the performance of 1/2 KB single-level qLDPC at the same
decoder complexity.Comment: Hakim Alhussien, Jaekyun Moon, "An Iteratively Decodable Tensor
Product Code with Application to Data Storage
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