Ultrafast harmonic mode-locking of monolithic compound-cavity laser diodes incorporating photonic-bandgap reflectors

We present the first demonstration of reproducible harmonic mode-locked operation from a novel design of monolithic semiconductor laser comprising a compound cavity formed by a 1-D photonic-bandgap (PBG) mirror. Mode-locking (ML) is achieved at a harmonic of the fundamental round-trip frequency with pulse repetition rates from 131 GHz up to a record high frequency of 2.1 THz. The devices are fabricated from GaAs-Al-GaAs material emitting at a wavelength of 860 nm and incorporate two gain sections with an etched PBG reflector between them, and a saturable absorber section. Autocorrelation studies are reported which allow the device behavior for different ML frequencies, compound cavity ratios, and type and number of intra-cavity reflectors to be analyzed. The highly reflective PBG microstructures are shown to be essential for subharmonic-free ML operation of the high-frequency devices. We have also demonstrated that the single PBG reflector can be replaced by two separate features with lower optical loss. These lasers may find applications in terahertz; imaging, medicine, ultrafast optical links, and atmospheric sensing

Nd:YAG development for spaceborne laser ranging system

The results of the development of a unique modelocked laser device to be utilized in future NASA space-based, ultraprecision laser ranger systems are summarized. The engineering breadboard constructed proved the feasibility of the pump-pulsed, actively modelocked, PTM Q-switched Nd:YAG laser concept for the generation of subnanosecond pulses suitable for ultra-precision ranging. The laser breadboard also included a double-pass Nd:YAG amplifier and provision for a Type II KD*P frequency doubler. The specific technical accomplishment was the generation of single 150 psec, 20-mJ pulses at 10 pps at a wavelength of 1.064 micrometers with 25 dB suppression of pre-and post-pulses

A Low Noise Sub-Sampling PLL in Which Divider Noise Is Eliminated and PD-CP Noise Is not multiplied by N^2

This paper presents a 2.2-GHz low jitter sub-sampling based PLL. It uses a phase-detector/charge-pump (PD/CP)that sub-samples the VCO output with the reference clock. In contrast to what happens in a classical PLL, the PD/CP noise is not multiplied by N2 in this sub-sampling PLL, resulting in a low noise contribution from the PD/CP. Moreover, no frequency divider is needed in the locked state and hence divider noise and power can be eliminated. An added frequency locked loop guarantees correct frequency locking without degenerating jitter performance when in lock. The PLL is implemented in a standard 0.18- m CMOS process. It consumes 4.2 mA from a 1.8 V supply and occupies an active area of 0.4 X 0.45 m

Direct detection optical intersatellite link at 220 Mbps using AlGaAs laser diode and silicon APD with 4-ary PPM signaling

A newly developed 220 Mbps free-space 4-ary pulse position modulation (PPM) direct detection optical communication system is described. High speed GaAs integrated circuits were used to construct the PPM encoder and receiver electronic circuits. Both PPM slot and word timing recovery were provided in the PPM receiver. The optical transmitter consisted of an AlGaAs laser diode (Mitsubishi ML5702A, lambda=821nm) and a high speed driver unit. The photodetector consisted of a silicon avalanche photodiode (APD) (RCA30902S) preceded by an optical interference filter (delta lambda=10nm). Preliminary tests showed that the self-synchronized PPM receiver could achieve a receiver bit error rate of less than 10(exp -6) at 25 nW average received optical signal power or 360 photons per transmitted information bit. The relatively poor receiver sensitivity was believed to be caused by the insufficient electronic bandwidth of the APD preamplifier and the poor linearity of the preamplifier high frequency response

Digitally-Assisted RF IC Design Techniques for Reliable Performance

Semiconductor industries have competitively scaled down CMOS devices to attain benefits of low cost, high performance, and high integration density in digital integrated circuits. On the other hand, deep scaled technologies inextricably accompany a large process variation, supply voltage scaling, and reduction in breakdown voltages of transistors. When it comes to RF/analog IC design, CMOS scaling adversely affects its reliability due to large performance variation and limited linearity. For addressing the issues related to variations and linearity, this research proposes the following digitally-assisted RF circuit design techniques: self-calibration system for RF phase shifters and wide dynamic range LNAs. Due to PVT variations in scaled technologies, RF phase shifter design becomes more challenging with device scaling. In the proposed self-calibration topology, we devised a novel phase sensing method and a pulsewidth-to-digital converter. The feedback controller is also designed in digital domain, which is robust to PVT variations. These unique techniques enable a sensing/control loop tolerant to PVT variations. The self-calibration loop was applied to a 7 to 13GHz phase shifter. With the calibration, the estimated phase error is less than 2 degrees. To overcome the linearity issue in scaled technologies, a digitally-controlled dual-mode LNA design is presented. A narrowband (5.1GHz) and a wideband (0.8 to 6GHz) LNA can be toggled between high-gain and high-linearity modes by digital control bits according to the input signal power. A compact design, which provides negligible performance degradation by additional circuitry, is achieved by sharing most of the components between the two operation modes. The narrowband and the wideband LNA achieves an input-referred P1dB of -1.8dBm and +4.2dBm, respectively

Sub-100-as timing jitter optical pulse trains from mode-locked Er-fiber lasers

We demonstrate sub-100-attosecond timing jitter optical pulse trains generated from free-running, 77.6-MHz repetition-rate, mode-locked Er-fiber lasers. At -0.002(\pm0.001) ps2 net cavity dispersion, the rms timing jitter is 70 as (224 as) integrated from 10 kHz (1 kHz) to 38.8 MHz offset frequency, when measured by a 24-as-resolution balanced optical cross-correlator. To our knowledge, this result corresponds to the lowest rms timing jitter measured from any mode-locked fiber lasers so far. The measured result also agrees fairly well with the Namiki-Haus analytic model of quantum-limited timing jitter in stretched-pulse fiber lasers.Comment: 4 pages, 2 figures, to appear in Optics Letter

Techniques for Wideband All Digital Polar Transmission

abstract: Modern Communication systems are progressively moving towards all-digital transmitters (ADTs) due to their high efficiency and potentially large frequency range. While significant work has been done on individual blocks within the ADT, there are few to no full systems designs at this point in time. The goal of this work is to provide a set of multiple novel block architectures which will allow for greater cohesion between the various ADT blocks. Furthermore, the design of these architectures are expected to focus on the practicalities of system design, such as regulatory compliance, which here to date has largely been neglected by the academic community. Amongst these techniques are a novel upconverted phase modulation, polyphase harmonic cancellation, and process voltage and temperature (PVT) invariant Delta Sigma phase interpolation. It will be shown in this work that the implementation of the aforementioned architectures allows ADTs to be designed with state of the art size, power, and accuracy levels, all while maintaining PVT insensitivity. Due to the significant performance enhancement over previously published works, this work presents the first feasible ADT architecture suitable for widespread commercial deployment.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

All-semiconductor High Power Mode-locked Laser System

All-optical synchronization and its application in advanced optical communications have been investigated in this dissertation. Dynamics of all-optical timing synchronization (clock recovery) using multi-section gain-coupled distributed-feedback (MS-GC DFB) lasers are discussed. A record speed of 180-GHz timing synchronization has been demonstrated using this device. An all-optical carrier synchronization (phase and polarization recovery) scheme from PSK (phase shift keying) data is proposed and demonstrated for the first time. As an application of all-optical synchronization, the characterization of advanced modulation formats using a linear optical sampling technique was studied. The full characterization of 10-Gb/s RZ-BPSK (return-to-zero binary PSK) data has been demonstrated. Fast lockup and walk-off of the all-optical timing synchronization process on the order of nanoseconds were measured in both simulation and experiment. Phase stability of the recovered clock from a pseudo-random bit sequence signal can be achieved by limiting the detuning between the frequency of free-running self-pulsation and the input bit rate. The simulation results show that all-optical clock recovery using TS-DFB lasers can maintain a better than 5 % clock phase stability for large variations in power, bit rate and optical carrier frequency of the input data and therefore is suitable for applications in ultrafast optical packet switching. All-optical timing synchronization of 180-Gb/s data streams has been demonstrated using a MS-GC DFB laser. The recovered clock has a jitter of less than 410 fs over a dynamic range of 7 dB. All-optical carrier synchronization from phase modulated data utilizes a phase sensitive oscillator (PSO), which used a phase sensitive amplifier (PSA) as a gain block. Furthermore, all-optical carrier synchronization from 10-Gb/s BPSK data was demonstrated in experiment. The PSA is configured as a nonlinear optical loop mirror (NOLM). A discrete linear system analysis was carried out to understand the stability of the PSO. Complex envelope measurement using coherent linear optical sampling with mode-locked sources is investigated. It is shown that reliable measurement of the phase requires that one of the optical modes of the sampling pulses be locked to the optical carrier of the data signal to be measured. Carrier-envelope offset (CEO) is found to have a negligible effect on the measurement. Measurement errors of the intensity profile and phase depend on the pulsewidth and chirp of the sampling pulses as well as the detuning between the carrier frequencies of the data signal and the center frequency of the sampling source. Characterization of the 10-Gb/s RZ-BPSK signal was demonstrated using the coherent detection technique. Measurements of the optical intensity profile, chirp and constellation diagram were demonstrated. A CW local oscillator was used and electrical sampling was performed using a sampling scope. A novel feedback scheme was used to stabilize homodyne detection

Design, development, and fabrication of a electronic analog microminiaturized electronic analog signal to discrete time interval converter

The microminiaturization of an electronic analog signal to discrete time interval converter is presented. Discrete components and integrated circuits comprising the converter were assembled on a thin-film ceramic substrate containing nichrome resistors with gold interconnections. The finished assembly is enclosed in a flat package measuring 3.30 by 4.57 centimeters. The module can be used whenever conversion of analog to digital signals is required, in particular for the purpose of regulation by means of pulse modulation. In conjunction with a precision voltage reference, the module was applied to control the duty cycle of a switching regulator within a temperature range of -55 C to +125 C, and an input voltage range of 10V to 35V. The output-voltage variation was less than + or - 300 parts per million, i.e., less than + or - 3mV for a 10V output