8 research outputs found
Refinement-based verification of sequential implementations of Stateflow charts
Simulink/Stateflow charts are widely used in industry for the specification
of control systems, which are often safety-critical. This suggests a need for a
formal treatment of such models. In previous work, we have proposed a technique
for automatic generation of formal models of Stateflow blocks to support
refinement-based reasoning. In this article, we present a refinement strategy
that supports the verification of automatically generated sequential C
implementations of Stateflow charts. In particular, we discuss how this
strategy can be specialised to take advantage of architectural features in
order to allow a higher level of automation.Comment: In Proceedings Refine 2011, arXiv:1106.348
Lessons from Formally Verified Deployed Software Systems (Extended version)
The technology of formal software verification has made spectacular advances,
but how much does it actually benefit the development of practical software?
Considerable disagreement remains about the practicality of building systems
with mechanically-checked proofs of correctness. Is this prospect confined to a
few expensive, life-critical projects, or can the idea be applied to a wide
segment of the software industry?
To help answer this question, the present survey examines a range of
projects, in various application areas, that have produced formally verified
systems and deployed them for actual use. It considers the technologies used,
the form of verification applied, the results obtained, and the lessons that
can be drawn for the software industry at large and its ability to benefit from
formal verification techniques and tools.
Note: a short version of this paper is also available, covering in detail
only a subset of the considered systems. The present version is intended for
full reference.Comment: arXiv admin note: text overlap with arXiv:1211.6186 by other author
Proving properties of Stateflow models using ISO Standard Z and CADiZ
Abstract. This paper focuses on the use of ISO Standard Z and CADiZ in the formal validation of Stateflow models against requirements-oriented assumptions. It documents some of what the Simulink/Stateflow Analyser tool does in support of the Practical Formal Specification method. The tool aims to automate the formal validations of the method, so that users of Simulink/Stateflow can benefit from them. The Z exploits some notations that are particular to ISO Standard Z. The automation is aided by quite terse tactics interpreted by CADiZ.