2,704 research outputs found

    Research and development for the data, trigger and control card in preparation for Hi-Lumi lhc

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    When the Large Hadron Collider (LHC) increases its luminosity by an order of magnitude in the coming decade, the experiments that sit upon it must also be upgraded to continue to their physics performance in the increasingly demanding environment. To achieve this, the Compact Muon Solenoid (CMS) experiment will make use of tracking information in the Level-1 trigger for the first time, meaning that track reconstruction must be achieved in less than 4 μs in an all-FPGA architecture. MUonE is an experiment aiming to make an accurate measurement of the the hadronic contribution to the anomalous magnetic moment of the muon. It will achieve this by making use of similar apparatus to that designed for CMS and benefit from the research and development efforts there. This thesis presents both development and testing work for the readout chain from tracker module to back-end processing card, as well as the results and analysis of a beam test used to validate this chain for both CMS and the MUonE experiment.Open Acces

    The LHCb Outer Tracker Front End Electronics

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    This note provides an overview of the front-end electronics used to readout the drift-times of the LHCb Outer Tracker straw tube chambers. The main functional components of the readout are the ASDBLR ASIC for amplification and signal digitization, the OTIS ASIC for the time measurement and for the L0 buffering, and the GOL ASIC to serialize the digital data for the optical data transmission. The L1 buffer board used to receive the data which is sent via the optical link is a common LHCb development and is not described here. This note supersedes an earlier document [1]
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