Limits on Fundamental Limits to Computation

An indispensable part of our lives, computing has also become essential to industries and governments. Steady improvements in computer hardware have been supported by periodic doubling of transistor densities in integrated circuits over the last fifty years. Such Moore scaling now requires increasingly heroic efforts, stimulating research in alternative hardware and stirring controversy. To help evaluate emerging technologies and enrich our understanding of integrated-circuit scaling, we review fundamental limits to computation: in manufacturing, energy, physical space, design and verification effort, and algorithms. To outline what is achievable in principle and in practice, we recall how some limits were circumvented, compare loose and tight limits. We also point out that engineering difficulties encountered by emerging technologies may indicate yet-unknown limits.Comment: 15 pages, 4 figures, 1 tabl

Development of All Dry Nanoimprint Lift-Off Process for Growth of Nanowires

In this project, nanoimprint lithography has been applied to define gold particles on the surface of an InP wafer. For achieving this aim, a dry etching process has been developed to create resist undercut for the lift-off. In order to prepare the required undercuts, RIE parameters were optimized and desired undercuts were made at etch times of 80 s to 120 s. Also, to obtain anisotropy and high etch selectivity, etch rate test of a best combination of polymer layer materials was investigated. Lift-off was realized and gold particles were deposited on predefined position on imprinted surface. Gold-seeded InP nanowires have been grown using metal-organic vapour phase epitaxy. Characterization by scanning electron microscope after growth demonstrated the high tendency of gold particles to move during epitaxial growth. Gold particles were merged together on the surface due to the presences of InP oxide induced by O2 plasma used in dry etching. Wet chemical treatment by using diluted HF and HCl solutions was applied to remove the InP oxide on the surface. The influence of wet chemical treatment to reduce the merging of gold particles and to improve the growth of nanowires was investigated. It was indicated that nanowires grew much better on the surface treated by a diluted HF solution. On the HF treated surface the smallest number of gold particles merged together resulting in nearly uniform InP nanowires grown on controlled position. The distribution of grown nanowires as diameter versus amount was plotted as a histogram and the behavior of nanowires grown was studied

Impact of adjacent dielectrics on the high-frequency performance of graphene field-effect transistors

Transistors operating at high frequencies are the basic building blocks of millimeter wave communication and sensor systems. The high velocity and mobility of carriers in graphene can open ways for development of ultra-fast group IV transistors with similar or even better performance than that achieved with III-V based semiconductors. However, the progress of high-speed graphene transistors has been hampered by limitations associated with fabrication, influence of adjacent materials and self-heating effects.This thesis work presents results of the comprehensive analysis of the influence of material imperfections, self-heating and limitations of the charge carrier velocity, imposed by adjacent dielectrics, on the transit frequency, fT, and the maximum frequency of oscillation, fmax, of graphene field-effect transistors (GFETs). The analysis allowed for better understanding and developing a strategy for addressing the limitations.In particular, it was shown that the GFET high-frequency performance can be enhanced by utilizing the gate and substrate dielectric materials with higher optical phonon (OP) energy, allowing for higher saturation velocity and, hence, higher fT and fmax. This approach was experimentally verified by demonstration of enhancement in the fT and fmax in GFETs with graphene channel encapsulated by the Al2O3 layers. As a further step, GFETs on diamond, material with highest OP energy and thermal conductivity, were introduced, developed and fabricated, showing the extrinsic fmax up to 50 GHz, at the gate length of 0.5 \ub5m, which is highest reported so far among the best published graphene and semiconductor counterparts.The main achievements of this thesis work are as follows: (i) comprehensive study of correlations between graphene-dielectric material quality, small-signal equivalent circuit parameters and high-frequency performance of the GFETs; (ii) experimental verification of the concept of improving the GFET high- frequency performance via selection of adjacent dielectric materials with high OP energy; (iii) introducing the diamond as a most promising dielectric material for high-frequency GFETs; (iv) development of technology and demonstration of fully integrated X and Ku band GFET IC amplifiers with state-of-the art performance.In conclusion, the routes of future development depicted in this thesis work may allow for enhancing the high-frequency performance of GFETs up to the level or even higher than that of the modern III-V semiconductor counterparts

The future of computing beyond Moore's Law.

Moore's Law is a techno-economic model that has enabled the information technology industry to double the performance and functionality of digital electronics roughly every 2 years within a fixed cost, power and area. Advances in silicon lithography have enabled this exponential miniaturization of electronics, but, as transistors reach atomic scale and fabrication costs continue to rise, the classical technological driver that has underpinned Moore's Law for 50 years is failing and is anticipated to flatten by 2025. This article provides an updated view of what a post-exascale system will look like and the challenges ahead, based on our most recent understanding of technology roadmaps. It also discusses the tapering of historical improvements, and how it affects options available to continue scaling of successors to the first exascale machine. Lastly, this article covers the many different opportunities and strategies available to continue computing performance improvements in the absence of historical technology drivers. This article is part of a discussion meeting issue 'Numerical algorithms for high-performance computational science'

Mining industry in developed countries and european strategy for the sector

Dissertação de mestrado em EconomiaO acesso a matérias-primas críticas tem sido um problema crescente desde o início dos anos 2000, não apenas dentro da União Europeia (UE), mas também fora dela. Visto que existem grandes países líderes como a China e os Estados Unidos da América (EUA) que estão a tentar obter o controlo das cadeias de abastecimento destes recursos, a UE começou a reagir de forma a diminuir a vantagem competitiva de outros países. Foi em 2008 que a Comissão Europeia (CE) começou a sugerir uma política mineral para os Estados membros e alguns países, incluindo Portugal, começaram a ter uma política nacional para estes recursos minerais. Existem dois grandes temas a serem discutidos, as indústrias de matérias-primas críticas e de semicondutores. Ambos estão correlacionados, pois estão na mesma cadeia de abastecimento, por isso é possível assumir que, dependendo da causa, como a guerra, pode ter efeitos críticos em ambas as indústrias. Os semicondutores são um componente vital das nossas vidas, pois são usados na produção de produtos eletrónicos. Políticas e iniciativas têm sido propostas pela CE há vários anos nos setores de matérias-primas críticas e semicondutores, a Iniciativa de Matérias-Primas e o EU Chips Act, respectivamente, com o objetivo de melhorar e fortalecer a competitividade europeia numa escala global nesta nova era digital, mas de forma segura e ambientalmente sustentável. O objetivo desta dissertação é entender como a economia e as cadeias de abastecimento dos setores discutidos funcionam, e estudar se as políticas europeias têm algum impacto significativo na indústria de mineração.Access to critical raw materials has been a growing problem since the early 2000’s not only within the European Union (EU) but outside of it as well. Since there are big leading countries such as China and the United States of America (USA) that are trying to get control of the supply chains of these resources, the EU began to react in order to diminish the competitive advantage of other countries. It has been since 2008 when the European Commission (EC) started to suggest a mineral policy for the member states and some countries, including Portugal, started to have a national policy for these mineral resources. There are two major topics to be discussed, the critical raw materials and the semiconductors industries. Both are correlated since they are in the same supply chain, so it is possible to assume that depending on the cause, such as war, it can have critical effects on both industries. Semiconductors are a vital component of our lives since they are used in the production of electronic products. Policies and initiatives have been proposed from the EC for several years in the sectors of critical raw materials and semiconductors, Raw Materials Initiative and EU Chips Act respectively, in order to improve and strengthen the Europe competitiveness in a global scale in this new digital era, but in a secure and environmentally sustainable method. The purpose of this dissertation is to understand how the economy and the supply chains of the discussed sectors work, and study if the European policies have any significant impact to the mining industry

Hybrid Two Dimensional Quantum Devices

This thesis describes measurements on hybrid material systems involving two dimensional (2D) materials and phenomena along with the development of a small, hermetically sealed cell. The hermetic cell is designed to assist with analyzing sensitive 2D materials outside of an inert environment. When working with van der Waals materials that are especially sensitive to oxygen or water, it can be difficult to identify usable thin flakes without exposing them to air. To help preserve materials for analysis in air, a capsule was designed that isolates the material in an inert environment. Although the capsule is hermetically sealed, the encapsulated material remains accessible to optical analysis; analysis that is crucial to device fabrication. The first system is a Josephson junction field effect transistor (JJ-FET) fabricated in epitaxial Al-InAs. The supercurrent through the junction in this system can be tuned by applying an external electric field with a gate. Typically, the gate dielectric is a thick oxide layer (50 nm) but the devices described here are able to achieve full supercurrent tunability, and comparable quality, with only a 5 nm thick layer of mechanically exfoliated 2D hexagonal boron nitride. The second set of measurements are on a superconductor/semiconductor devices based on germanium quantum wells with epitaxial Al contacts. These serve as the first steps toward realizing a many-qubit system that can leverage the high mobility, spin properties, and fabrication advantages of germanium. These measurements are of the magnetotransport characteristics of MBE grown, strained germanium quantum wells embeded in a SiGe heterostructure. The devices discussed here demonstrate suitable electrical properties for Josephson junction development towards the goal of a gatemon qubit

Earth Abundant Thin Film Technology for Next Generation Photovoltaic Modules

With a cumulative generation capacity of over 100 GW, Photovoltaics (PV) technology is uniquely poised to become increasingly popular in the coming decades. Although, several breakthroughs have propelled PV technology, it accounts for only less than 1% of the energy produced worldwide. This aspect of the PV technology is primarily due to the somewhat high cost per watt, which is dependent on the efficiency of the PV cells as well as the cost of manufacturing and installing them. Currently, the efficiency of the PV conversion process is limited to about 25% for commercial terrestrial cells; improving this efficiency can increase the penetration of PV worldwide rapidly. A critical review of all possibilities pursued in the public domain reveals serious shortcomings and manufacturing issues. To make PV generated power a reality in every home, a Multi-Junction Multi-Terminal (MJMT) PV architecture can be employed combining silicon and another earth abundant material. However, forming electronic grade thin films of earth abundant materials is a non-trivial challenge; without solving this, it is impossible to increase the overall PV efficiency. Deposition of Copper (I) Oxide, an earth abundant semiconducting material, was conducted using an optimized Photo assisted Chemical Vapor Deposition process. X-Ray Diffraction, Ellipsometry, Transmission Electron Microscopy, and Profilometry revealed that the films composed of Cu2O of about 90 nm thickness and the grain size was as large as 600 nm. This result shows an improvement in material properties over previously grown thin films of Cu2O. Measurement of I-V characteristics of a diode structure composed of the Cu2O indicates an increase in On/Off ratio to 17,000 from the previous best value of 800. These results suggest that the electronic quality of the thin films deposited using our optimized process to be better than the results reported elsewhere. Using this optimized thin film forming technique, it is now possible to create a complete MJMT structure to improve the terrestrial commercial PV efficiency

Study of the impact of lithography techniques and the current fabrication processes on the design rules of tridimensional fabrication technologies

Working for the photolithography tool manufacturer leader sometimes gives me the impression of how complex and specific is the sector I am working on. This master thesis topic came with the goal of getting the overall picture of the state-of-the-art: stepping out and trying to get a helicopter view usually helps to understand where a process is in the productive chain, or what other firms and markets are doing to continue improvingUniversidad de sevilla.Máster Universitario en Microelectrónica: Diseño y Aplicaciones de Sistemas Micro/Nanométrico