1,619 research outputs found

    SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips

    Get PDF
    This paper presents SIRENA, a CAD environment for the simulation and modelling of mixed-signal VLSI parallel processing chips based on cellular neural networks. SIRENA includes capabilities for: (a) the description of nominal and non-ideal operation of CNN analogue circuitry at the behavioural level; (b) performing realistic simulations of the transient evolution of physical CNNs including deviations due to second-order effects of the hardware; and, (c) evaluating sensitivity figures, and realize noise and Monte Carlo simulations in the time domain. These capabilities portray SIRENA as better suited for CNN chip development than algorithmic simulation packages (such as OpenSimulator, Sesame) or conventional neural networks simulators (RCS, GENESIS, SFINX), which are not oriented to the evaluation of hardware non-idealities. As compared to conventional electrical simulators (such as HSPICE or ELDO-FAS), SIRENA provides easier modelling of the hardware parasitics, a significant reduction in computation time, and similar accuracy levels. Consequently, iteration during the design procedure becomes possible, supporting decision making regarding design strategies and dimensioning. SIRENA has been developed using object-oriented programming techniques in C, and currently runs under the UNIX operating system and X-Windows framework. It employs a dedicated high-level hardware description language: DECEL, fitted to the description of non-idealities arising in CNN hardware. This language has been developed aiming generality, in the sense of making no restrictions on the network models that can be implemented. SIRENA is highly modular and composed of independent tools. This simplifies future expansions and improvements.Comisión Interministerial de Ciencia y Tecnología TIC96-1392-C02-0

    Fabrication and Application of a Polymer Neuromorphic Circuitry Based on Polymer Memristive Devices and Polymer Transistors

    Get PDF
    Neuromorphic engineering is a discipline that aims to address the shortcomings of today\u27s serial computers, namely large power consumption, susceptibility to physical damage, as well as the need for explicit programming, by applying biologically-inspired principles to develop neural systems with applications such as machine learning and perception, autonomous robotics and generic artificial intelligence. This doctoral dissertation presents work performed fabricating a previously developed type of polymer neuromorphic architecture, termed Polymer Neuromorphic Circuitry (PNC), inspired by the McCulloch-Pitts model of an artificial neuron. The major contribution of this dissertation is a development of processing techniques necessary to realize the Polymer Neuromorphic Circuitry, which required a development of individual polymer electronics elements, as well as customization of fabrication processes necessary for the realization of the circuitry on separate substrates as well as on a single substrate. This is the first demonstration of a fabrication of an entire neuron, and more importantly, a network of such neurons, that includes both the weighting functionality of a synapse and the somatic summing, all realized with polymer electronics technology. Polymer electronics is a new branch of electronics that is based on conductive and semi-conductive polymers. These new elements hold a great advantage over the conventional, inorganic electronics in the form of physical flexibility, low cost and ease of fabrication, manufacturing compatibility with many substrate materials, as well as greater biological compatibility. These advantages were the primary motivation for the choice to fabricate all of the electrical components required to realize the PNC, namely polymer transistors, polymer memristive devices, and polymer resistors, with polymer electronics components. The efficacy of this design is validated by demonstrating that the activation function of a single neuron approximates the sigmoidal function commonly employed by artificial neural networks. The utility of the neuromorphic circuitry is further corroborated by illustrating that a network of such neurons, and even a single neuron, are capable of performing linear classification for a real-life problem

    Sensing and perception: Connectionist approaches to subcognitive computing

    Get PDF
    New approaches to machine sensing and perception are presented. The motivation for crossdisciplinary studies of perception in terms of AI and neurosciences is suggested. The question of computing architecture granularity as related to global/local computation underlying perceptual function is considered and examples of two environments are given. Finally, the examples of using one of the environments, UCLA PUNNS, to study neural architectures for visual function are presented

    Pavlov's dog associative learning demonstrated on synaptic-like organic transistors

    Full text link
    In this letter, we present an original demonstration of an associative learning neural network inspired by the famous Pavlov's dogs experiment. A single nanoparticle organic memory field effect transistor (NOMFET) is used to implement each synapse. We show how the physical properties of this dynamic memristive device can be used to perform low power write operations for the learning and implement short-term association using temporal coding and spike timing dependent plasticity based learning. An electronic circuit was built to validate the proposed learning scheme with packaged devices, with good reproducibility despite the complex synaptic-like dynamic of the NOMFET in pulse regime

    Modeling the Resource Requirements of Convolutional Neural Networks on Mobile Devices

    Full text link
    Convolutional Neural Networks (CNNs) have revolutionized the research in computer vision, due to their ability to capture complex patterns, resulting in high inference accuracies. However, the increasingly complex nature of these neural networks means that they are particularly suited for server computers with powerful GPUs. We envision that deep learning applications will be eventually and widely deployed on mobile devices, e.g., smartphones, self-driving cars, and drones. Therefore, in this paper, we aim to understand the resource requirements (time, memory) of CNNs on mobile devices. First, by deploying several popular CNNs on mobile CPUs and GPUs, we measure and analyze the performance and resource usage for every layer of the CNNs. Our findings point out the potential ways of optimizing the performance on mobile devices. Second, we model the resource requirements of the different CNN computations. Finally, based on the measurement, pro ling, and modeling, we build and evaluate our modeling tool, Augur, which takes a CNN configuration (descriptor) as the input and estimates the compute time and resource usage of the CNN, to give insights about whether and how e ciently a CNN can be run on a given mobile platform. In doing so Augur tackles several challenges: (i) how to overcome pro ling and measurement overhead; (ii) how to capture the variance in different mobile platforms with different processors, memory, and cache sizes; and (iii) how to account for the variance in the number, type and size of layers of the different CNN configurations

    Organic neuromorphic computing:at the interface with bioelectronics

    Get PDF
    corecore