A programmable microsystem using system-on-chip for real-time biotelemetry

A telemetry microsystem, including multiple sensors, integrated instrumentation and a wireless interface has been implemented. We have employed a methodology akin to that for System-on-Chip microelectronics to design an integrated circuit instrument containing several "intellectual property" blocks that will enable convenient reuse of modules in future projects. The present system was optimized for low-power and included mixed-signal sensor circuits, a programmable digital system, a feedback clock control loop and RF circuits integrated on a 5 mm × 5 mm silicon chip using a 0.6 μm, 3.3 V CMOS process. Undesirable signal coupling between circuit components has been investigated and current injection into sensitive instrumentation nodes was minimized by careful floor-planning. The chip, the sensors, a magnetic induction-based transmitter and two silver oxide cells were packaged into a 36 mm × 12 mm capsule format. A base station was built in order to retrieve the data from the microsystem in real-time. The base station was designed to be adaptive and timing tolerant since the microsystem design was simplified to reduce power consumption and size. The telemetry system was found to have a packet error rate of 10<sup>-</sup><sup>3</sup> using an asynchronous simplex link. Trials in animal carcasses were carried out to show that the transmitter was as effective as a conventional RF device whilst consuming less power

Design, implementation, evaluation and application of a 32-channel radio frequency signal generator for thermal magnetic resonance based anti-cancer treatment

Thermal Magnetic Resonance (ThermalMR) leverages radio frequency (RF)-induced heating to examine the role of temperature in biological systems and disease. To advance RF heating with multi-channel RF antenna arrays and overcome the shortcomings of current RF signal sources, this work reports on a 32-channel modular signal generator (SG(PLL)). The SG(PLL) was designed around phase-locked loop (PLL) chips and a field-programmable gate array chip. To examine the system properties, switching/settling times, accuracy of RF power level and phase shifting were characterized. Electric field manipulation was successfully demonstrated in deionized water. RF heating was conducted in a phantom setup using self-grounded bow-tie RF antennae driven by the SG(PLL). Commercial signal generators limited to a lower number of RF channels were used for comparison. RF heating was evaluated with numerical temperature simulations and experimentally validated with MR thermometry. Numerical temperature simulations and heating experiments controlled by the SG(PLL) revealed the same RF interference patterns. Upon RF heating similar temperature changes across the phantom were observed for the SG(PLL) and for the commercial devices. To conclude, this work presents the first 32-channel modular signal source for RF heating. The large number of coherent RF channels, wide frequency range and accurate phase shift provided by the SG(PLL) form a technological basis for ThermalMR controlled hyperthermia anti-cancer treatment

Pinpoint: Location Beacon and Tracking

The purpose of Pinpoint was to create a device that can collect and transmit location information for multiple users on a wireless network. The device would be used to keep track of and communicate with other users nearby. The final design includes a touchscreen display as a graphical user interface (GUI), an XBee RF module for wireless networking, a GPS receiver for location tracking, and a Programmable System on a Chip (PSoC) to control the modules

Switched-RC radio frequency N-path filters

Tunable on-chip Radio Frequency (RF) filtering is highly desirable for cost effective wireless communication devices. As mobile wireless devices increasingly support multiple RF-bands, tunable RF filtering is wanted. The tremendous growth of wireless communication combined with scarcely available spectrum asks for new, more programmable radio hardware. This has led to the concept of a cognitive radio capable of smart dynamic spectrum access (DSA) which asks for software-defined radio (SDR) hardware, with flexibly programmable tunable filtering. \ud In this thesis N-path switched-RC circuits are explored, aiming for RF pre-filtering for wireless transceivers. The filter concept fits well to SDR as the center frequency is programmable by the switching frequency, i.e. via a digital clock. As new CMOS technologies provide higher density capacitors and MOS switches with low on-resistance and low parasitic capacitance, N-path filtering benefits from Moore’s law. \ud To demonstrate feasibility, a 4-path differential switched-RC bandpass filter, an 8-path single-ended, as well as an 8-path differential bandstop (notch) filter have been implemented in 65nm CMOS technology. A mathematical analysis is presented to describe the filtering behavior as well as various imperfections for the N-path bandpass and notch filters. The implemented bandpass filter provides an in-band input referred third order intercept point IIP3in-band>+14 dBm with compression point P1dB,in-band>0 dBm at a noise figure NF<6 dB. The filter is tunable from 0.1-1 GHz. For the 8-path notch filters, IIP3in-band>17 dBm, P1dB,in-band>2 dBm and NF<3 dB are achieved while the notch frequency is tunable from 0.1-1.2 GHz with the rejection of >20 dB. Especially the compression point and IIP3 are much higher than what is typically achieved with RF CMOS receivers.\ud The N-path filtering technique can also be applied for spatial filtering purposes. A 4-element phased-array system has been implemented in 65nm CMOS technology. 8-phase passive mixers translate the Spatial- and frequency-domain filtering from baseband to RF frequencies at the antenna inputs. As a result a remarkable input compression point P1dB of up to +10 dBm is achieved for out-of-band/beam blockers

Сочинения князя Владимира Мономаха как источник духовных ценностей восточнославянской цивилизации

Next generation mobile communication standards have high demands on the radio-frequency (RF) frontend performance of mobile devices. New OFDM based mobile standards like 3GPP LTE, WiMax, or WLAN require a high signal bandwidth, high dynamic range as well as a high reconfigurability. Moreover, for each communication standard and frequency band an own RF transceiver is needed for state-of-the-art handhelds. To reduce the needed number of transceivers for devices like smartphones,a reconfigurable RF-frontend is needed, in order to save chip and PCB area and hence cost. Longterm goal is the so-called "Software Defined Radio" (SDR). In the framework of this thesis, a reconfigurable, mostly digital transmitter was developed, which utilizes a so-called RF-DAC. The RF-DAC unites digital-to-analog converter (DAC) and upconversion mixer in a single building block. Thereby, it is possible to convert digital signals directly to RF modulated signals. The usage of an RF-DAC allows the elimination of the all analog baseband signal blocks, like filters and baseband amplifiers. Instead, they are replaced by digital, programmable circuits. Furthermore, all transistors in the RF-DAC operate as switches. The requirements on the "analog" performance of the transistors is low. Hence, RF-DAC based transmitters are especially suited for the implementation in "nanoscale" CMOS technologies with feature sizes of 65nm and below. These CMOS technologies enable high-performance digital circuits as well as a low-cost mass production. In this thesis, first a system concept for an RF-DAC based transmitter, which supports high data rates, is discussed. The RF-DAC architecture has the drawback, that it is not feasible to implement a reconstruction filter within the monolithic connection of DAC and mixer. As a consequence, the RF-DAC emits unwanted signal replica at multiples of the DAC sampling rate. Therefore, special emphasis has been laid the analysis of techniques to reduce these unwanted emissions. Furthermore, a circuit implementation of an RF-DAC based I/Q vector modulator has been conducted and is thoroughly discussed. The RF-DAC has a resolution of 9bit and a maximum sampling rate of 850 MHz. A novel RF-DAC implementation allows especially high output power levels and at the same time a low power consumption at low signal amplitudes. Measurements of the fabricated chip prove the capability of the transmitter. A maximum output power of +16dBm is one decade higher than the power levels of comparable architectures. The power consumption drops from 280mW for a full-scale sinusoidal signal with +14dBm output power to 47mW when reducing the amplitude by 48 dB. This shows the effectiveness of the above mentioned measures to reduce power consumption at low signal amplitudes. In addition to the amplitude resolution of 8bit, the output power can be scaled in a range of more than 80 dB by varying the biasing currents. The RF-DAC transmitter is able to process 20 MHz wide 64QAM OFDM WLAN signals and fulfills the spectral mask the IEEE 802.11n standard

Programmable photonics : an opportunity for an accessible large-volume PIC ecosystem

We look at the opportunities presented by the new concepts of generic programmable photonic integrated circuits (PIC) to deploy photonics on a larger scale. Programmable PICs consist of waveguide meshes of tunable couplers and phase shifters that can be reconfigured in software to define diverse functions and arbitrary connectivity between the input and output ports. Off-the-shelf programmable PICs can dramatically shorten the development time and deployment costs of new photonic products, as they bypass the design-fabrication cycle of a custom PIC. These chips, which actually consist of an entire technology stack of photonics, electronics packaging and software, can potentially be manufactured cheaper and in larger volumes than application-specific PICs. We look into the technology requirements of these generic programmable PICs and discuss the economy of scale. Finally, we make a qualitative analysis of the possible application spaces where generic programmable PICs can play an enabling role, especially to companies who do not have an in-depth background in PIC technology

Mask Programmable CMOS Transistor Arrays for Wideband RF Integrated Circuits

A mask programmable technology to implement RF and microwave integrated circuits using an array of standard 90-nm CMOS transistors is presented. Using this technology, three wideband amplifiers with more than 15-dB forward transmission gain operating in different frequency bands inside a 4-22-GHz range are implemented. The amplifiers achieve high gain-bandwidth products (79-96 GHz) despite their standard multistage designs. These amplifiers are based on an identical transistor array interconnected with application specific coplanar waveguide (CPW) transmission lines and on-chip capacitors and resistors. CPW lines are implemented using a one-metal-layer post-processing technology over a thick Parylene-N (15 mum ) dielectric layer that enables very low loss lines (~0.6 dB/mm at 20 GHz) and high-performance CMOS amplifiers. The proposed integration approach has the potential for implementing cost-efficient and high-performance RF and microwave circuits with a short turnaround time

A Scalable 6-to-18 GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS

This paper reports a 6-to-18 GHz integrated phased- array receiver implemented in 130-nm CMOS. The receiver is easily scalable to build a very large-scale phased-array system. It concurrently forms four independent beams at two different frequencies from 6 to 18 GHz. The nominal conversion gain of the receiver ranges from 16 to 24 dB over the entire band while the worst-case cross-band and cross-polarization rejections are achieved 48 dB and 63 dB, respectively. Phase shifting is performed in the LO path by a digital phase rotator with the worst-case RMS phase error and amplitude variation of 0.5° and 0.4 dB, respectively, over the entire band. A four-element phased-array receiver system is implemented based on four receiver chips. The measured array patterns agree well with the theoretical ones with a peak-to-null ratio of over 21.5 dB