Development of LabVIEW FPGA program for Energy Management System (EMS) Controller for Hybrid Electric Vehicle (HEV)

This dissertation explains the construction of LabVIEW Field Programmable Gate Array (FPGA) for Energy Management System (EMS) Controller for Hybrid Electric Vehicle (HEV). The HEV is engineered to reduce the world’s dependency on fossil fuels. An HEV is designed to utilize two power sources which are from electric motor and an internal combustion engine (ICE). These sources need to be carefully controlled so that the energy of both sources can be synergized to achieve fuel and power efficiency in the vehicle. The control algorithm is implemented by an EMS Controller for which in this project, it will run on a National Instruments (NI) CompactRIO, cRIO-9076. This EMS controller algorithm will be built and designed in FPGA of NI LabVIEW to extract and control parameters from the electric motor controller, which is the Motor Control Unit (MCU) and the engine controller, which is the Engine Control Unit (ECU). The extracted and controlled parameters are engine RPM, vehicle speed and vehicle fuel consumption. These data will be output using the embedded server to the client, which is a windows-based tablet PC and the embedded server is cRIO-9076. The communication between server and client will be implemented using HTTP-based communication protocol making the data appear in HyperText Mark-up Language (HTML) which will be rendered into the Graphical User Interface (GUI) web page interface. This GUI will enable the driver to monitor and control the MCU and ECU of the Hybrid Electric Vehicle

Development of LabVIEW FPGA program for Energy Management System (EMS) Controller for Hybrid Electric Vehicle (HEV)

This dissertation explains the construction of LabVIEW Field Programmable Gate Array (FPGA) for Energy Management System (EMS) Controller for Hybrid Electric Vehicle (HEV). The HEV is engineered to reduce the world’s dependency on fossil fuels. An HEV is designed to utilize two power sources which are from electric motor and an internal combustion engine (ICE). These sources need to be carefully controlled so that the energy of both sources can be synergized to achieve fuel and power efficiency in the vehicle. The control algorithm is implemented by an EMS Controller for which in this project, it will run on a National Instruments (NI) CompactRIO, cRIO-9076. This EMS controller algorithm will be built and designed in FPGA of NI LabVIEW to extract and control parameters from the electric motor controller, which is the Motor Control Unit (MCU) and the engine controller, which is the Engine Control Unit (ECU). The extracted and controlled parameters are engine RPM, vehicle speed and vehicle fuel consumption. These data will be output using the embedded server to the client, which is a windows-based tablet PC and the embedded server is cRIO-9076. The communication between server and client will be implemented using HTTP-based communication protocol making the data appear in HyperText Mark-up Language (HTML) which will be rendered into the Graphical User Interface (GUI) web page interface. This GUI will enable the driver to monitor and control the MCU and ECU of the Hybrid Electric Vehicle

Investigation of Traditional and Alternate Living Hinge Designs for Fused Deposition Modeling Additive Manufacturing Process

A manuscript-style thesis composed of three studies covered the application of living hinge designs in the additive manufacturing process of fused deposition modeling. Initial research included comparing numerical and analytical linear analyses on a traditional living hinge design. The second research consisted of tensile testing for the material properties of the Acrylonitrile Butadiene Styrene (ABS) used in fused deposition modeling (FDM) process by the MakerBot 2X as well as adjusting the traditional design to be printed. The third study explored alternate living hinge designs that utilize the geometric freedom provided by additive manufacturing to more evenly distribute stress across the hinge. The traditional living hinge design is not feasible for FDM ABS while alternate designs such as a longer hinge length or wave pattern demonstrated minimal stress experienced across the hinge. Further research on optimizing alternate designs is encouraged

Outsourcing trends in semiconductor industry

Thesis (S.M. in Engineering and Management)--Massachusetts Institute of Technology, Engineering Systems Division, 2010.Cataloged from PDF version of thesis.Includes bibliographical references (p. 82-83).Microelectronic devices traditionally were manufactured by companies that both designed and produced integrated chips. This process was important in 1970's and 1980's when the manufacturing processes required tweaking the design, understanding of the manufacturing processes and occasional need to redesign. As manufacturing techniques and standards evolved, companies have changed their business model and have started to outsource their manufacturing to merchant foundries. Semiconductor companies have also started to outsource the design and verification of their chips to third party design service companies and focus on core competence like research and development of new technologies and defining protocols. This trend has evolved even though the chips have become much more complex, hard to design and hard to manufacture. This thesis studies the different players in the supply chain, how each player has evolved and the challenges companies face in making decisions regarding outsourcing internal processes. It was found that the advancements in the downstream industries such as EDA, Design Suppliers and EMS have helped fabless companies remain competitive with IDM's (Integrated Device Manufacturers). The fabless companies compete in different markets that do not need the most advanced processing technologies used by leading-edge companies.by Karthikeyan Malli Mohan.S.M.in Engineering and Managemen

Layout regularity metric as a fast indicator of process variations

Integrated circuits design faces increasing challenge as we scale down due to the increase of the effect of sensitivity to process variations. Systematic variations induced by different steps in the lithography process affect both parametric and functional yields of the designs. These variations are known, themselves, to be affected by layout topologies. Design for Manufacturability (DFM) aims at defining techniques that mitigate variations and improve yield. Layout regularity is one of the trending techniques suggested by DFM to mitigate process variations effect. There are several solutions to create regular designs, like restricted design rules and regular fabrics. These regular solutions raised the need for a regularity metric. Metrics in literature are insufficient for different reasons; either because they are qualitative or computationally intensive. Furthermore, there is no study relating either lithography or electrical variations to layout regularity. In this work, layout regularity is studied in details and a new geometrical-based layout regularity metric is derived. This metric is verified against lithographic simulations and shows good correlation. Calculation of the metric takes only few minutes on 1mm x 1mm design, which is considered fast compared to the time taken by simulations. This makes it a good candidate for pre-processing the layout data and selecting certain areas of interest for lithographic simulations for faster throughput. The layout regularity metric is also compared against a model that measures electrical variations due to systematic lithographic variations. The validity of using the regularity metric to flag circuits that have high variability using the developed electrical variations model is shown. The regularity metric results compared to the electrical variability model results show matching percentage that can reach 80%, which means that this metric can be used as a fast indicator of designs more susceptible to lithography and hence electrical variations

Embedded Machine Learning: Emphasis on Hardware Accelerators and Approximate Computing for Tactile Data Processing

Machine Learning (ML) a subset of Artificial Intelligence (AI) is driving the industrial and technological revolution of the present and future. We envision a world with smart devices that are able to mimic human behavior (sense, process, and act) and perform tasks that at one time we thought could only be carried out by humans. The vision is to achieve such a level of intelligence with affordable, power-efficient, and fast hardware platforms. However, embedding machine learning algorithms in many application domains such as the internet of things (IoT), prostheses, robotics, and wearable devices is an ongoing challenge. A challenge that is controlled by the computational complexity of ML algorithms, the performance/availability of hardware platforms, and the application\u2019s budget (power constraint, real-time operation, etc.). In this dissertation, we focus on the design and implementation of efficient ML algorithms to handle the aforementioned challenges. First, we apply Approximate Computing Techniques (ACTs) to reduce the computational complexity of ML algorithms. Then, we design custom Hardware Accelerators to improve the performance of the implementation within a specified budget. Finally, a tactile data processing application is adopted for the validation of the proposed exact and approximate embedded machine learning accelerators. The dissertation starts with the introduction of the various ML algorithms used for tactile data processing. These algorithms are assessed in terms of their computational complexity and the available hardware platforms which could be used for implementation. Afterward, a survey on the existing approximate computing techniques and hardware accelerators design methodologies is presented. Based on the findings of the survey, an approach for applying algorithmic-level ACTs on machine learning algorithms is provided. Then three novel hardware accelerators are proposed: (1) k-Nearest Neighbor (kNN) based on a selection-based sorter, (2) Tensorial Support Vector Machine (TSVM) based on Shallow Neural Networks, and (3) Hybrid Precision Binary Convolution Neural Network (BCNN). The three accelerators offer a real-time classification with monumental reductions in the hardware resources and power consumption compared to existing implementations targeting the same tactile data processing application on FPGA. Moreover, the approximate accelerators maintain a high classification accuracy with a loss of at most 5%

Design of a Three-Phase Brushless DC Motor Control System

In the past several decades, the Brushless DC (BLDC) motor has seen increased usage due to several distinct advantages over its brushed counterpart, including higher performance, increased reliability, and minimal maintenance requirements. However, the electronic commutation system of the BLDC motor creates the need for an accompanying electronic motor control system of increased complexity, adding to the overall cost of the BLDC motor and motor control system. As such, continued research and exploration in the area of BLDC motor control is necessary to continue to reduce the cost of BLDC motors and their corresponding motor control systems. This project focuses on the design of a motor control system for a Three-Phase Brushless DC Motor. A printed circuit board was designed for use in Three-Phase BLDC motor control and the design process was documented within this report. Due to an international IC shortage at the time of this project, fabrication was unable to be completed, however fabrication plans and cost estimation is included herein. Preliminary software modifications were tested to the extent possible with an off-the-shelf evaluation board, and future software modifications were outlined. Description of the hardware design and software development of this system is included in this report, as well as analysis of this system for future design, fabrication, and testing