17,853 research outputs found

    Programmable coordination media

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    Flexible programmable networking: A reflective, component-based approach

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    The need for programmability and adaptability in networking systems is becoming increasingly important. More specifically, the challenge is in the ability to add services rapidly, and be able to deploy, configure and reconfigure them as easily as possible. Such demand is creating a considerable shift in the way networks are expected to operate in the future. This is the main aim of programmable networking research community, and in our project we are investigating a component-based approach to the structuring of programmable networking software. Our intention is to apply the notion of components, component frameworks and reflection ubiquitously, thus accommodating all the different elements that comprise a programmable networking system

    A low cost reconfigurable soft processor for multimedia applications: design synthesis and programming model

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    This paper presents an FPGA implementation of a low cost 8 bit reconfigurable processor core for media processing applications. The core is optimized to provide all basic arithmetic and logic functions required by the media processing and other domains, as well as to make it easily integrable into a 2D array. This paper presents an investigation of the feasibility of the core as a potential soft processing architecture for FPGA platforms. The core was synthesized on the entire Virtex FPGA family to evaluate its overall performance, scalability and portability. A special feature of the proposed architecture is its simple programming model which allows low level programming. Throughput results for popular benchmarks coded using the programming model and cycle accurate simulator are presented

    A C++-embedded Domain-Specific Language for programming the MORA soft processor array

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    MORA is a novel platform for high-level FPGA programming of streaming vector and matrix operations, aimed at multimedia applications. It consists of soft array of pipelined low-complexity SIMD processors-in-memory (PIM). We present a Domain-Specific Language (DSL) for high-level programming of the MORA soft processor array. The DSL is embedded in C++, providing designers with a familiar language framework and the ability to compile designs using a standard compiler for functional testing before generating the FPGA bitstream using the MORA toolchain. The paper discusses the MORA-C++ DSL and the compilation route into the assembly for the MORA machine and provides examples to illustrate the programming model and performance

    Openwifi : a free and open-source IEEE802.11 SDR implementation on SoC

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    Open source Software Defined Radio (SDR) project, such as srsLTE and Open Air Interface (OAI), has been widely used for 4G/5G research. However the SDR implementation of the IEEE802.11 (Wi-Fi) is still difficult. The Wi-Fi Short InterFrame Space (SIFS) requires acknowledgement (ACK) packet being sent out in 10ÎŒs/16ÎŒs(2.4 GHz/5GHz) after receiving a packet successfully, thus the Personal Computer (PC) based SDR architecture hardly can be used due to the latency (≄100ÎŒs) between PC and Radio Frequency (RF) front-end. Researchers have to do simulation, hack a commercial chip or buy an expensive reference design to test their ideas. To change this situation, we have developed an open-source full-stack IEEE802.11a/g/n SDR implementation — openwifi. It is based on Xilinx Zynq Systemon-Chip (SoC) that includes Field Programmable Gate Array (FPGA) and ARM processor. With the low latency connection between FPGA and RF front-end, the most critical SIFS timing is achieved by implementing Physical layer (PHY) and low level Media Access Control (low MAC) in FPGA. The corresponding driver is implemented in the embedded Linux running on the ARM processor. The driver instantiates Application Programming Interfaces (APIs) defined by Linux mac80211 subsystem, which is widely used for most SoftMAC Wi-Fi chips. Researchers could study and modify openwifi easily thanks to the modular design. Compared to PC based SDR, the SoC is also a better choice for portable and embedded scenario
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