Heterogeneous Photonic Network-on-Chip with Dynamic Bandwidth Allocation

Advancements in the field of chip fabrication has facilitated in integrating more number of transistors in a given area which has lead to an era of multi-core processors. Future multi-core chips or chip multiprocessors (CMPs) will have hundreds of heterogeneous components including processing engines, custom logic, GPU units, programmable fabrics and distributed memory. Such multi-core chips are expected to run varied multiple parallel workloads simultaneously. Hence, different communicating cores will require different bandwidths leading to the necessity of a heterogeneous Network-on-Chip (NoC) architecture. Simply over-provisioning for performance will invariably result in loss of power efficiency. On the other hand, recent research has shown that photonic interconnects are capable of achieving high-bandwidth and energy-efficient on-chip data transfer. In this paper we propose a dynamic heterogeneous photonic NoC (d-HetPNOC) architecture with dynamic bandwidth allocation to achieve better performance and energy-efficiency compared to a homogeneous photonic NoC architecture with the same aggregate data bandwidth

Machine Learning for Optical Network Security Monitoring: A Practical Perspective

In order to accomplish cost-efficient management of complex optical communication networks, operators are seeking automation of network diagnosis and management by means of Machine Learning (ML). To support these objectives, new functions are needed to enable cognitive, autonomous management of optical network security. This paper focuses on the challenges related to the performance of ML-based approaches for detectionand localization of optical-layer attacks, and to their integration with standard Network Management Systems (NMSs). We propose a framework for cognitive security diagnostics that comprises an attack detection module with Supervised Learning (SL), Semi-Supervised Learning (SSL) and Unsupervised Learning (UL) approaches, and an attack localization module that deduces the location of a harmful connection and/or a breached link. The influence of false positives and false negatives is addressed by a newly proposed Window-based Attack Detection (WAD) approach. We provide practical implementation\ua0guidelines for the integration of the framework into the NMS and evaluate its performance in an experimental network testbed subjected to attacks, resulting with the largest optical-layer security experimental dataset reported to date

Root Cause Analysis for Autonomous Optical Network Security Management

The ongoing evolution of optical networks towards autonomous systems supporting high-performance services beyond 5G requires advanced functionalities for automated security management. To cope with evolving threat landscape, security diagnostic approaches should be able to detect and identify the nature not only of existing attack techniques, but also those hitherto unknown or insufficiently represented. Machine Learning (ML)-based algorithms perform well when identifying known attack types, but cannot guarantee precise identification of unknown attacks. This makes Root Cause Analysis (RCA) crucial for enabling timely attack response when human intervention is unavoidable. We address these challenges by establishing an ML-based framework for security assessment and analyzing RCA alternatives for physical-layer attacks. We first scrutinize different Network Management System (NMS) architectures and the corresponding security assessment capabilities. We then investigate the applicability of supervised and unsupervised learning (SL and UL) approaches for RCA and propose a novel UL-based RCA algorithm called Distance-Based Root Cause Analysis (DB-RCA). The framework’s applicability and performance for autonomous optical network security management is validated on an experimental physical-layer security dataset, assessing the benefits and drawbacks of the SL-and UL-based RCA. Besides confirming that SL-based approaches can provide precise RCA output for known attack types upon training, we show that the proposed UL-based RCA approach offers meaningful insight into the anomalies caused by novel attack types, thus supporting the human security officers in advancing the physical-layer security diagnostics

Physical Layer Aware Optical Networks

This thesis describes novel contributions in the field of physical layer aware optical networks. IP traffic increase and revenue compression in the Telecom industry is putting a lot of pressure on the optical community to develop novel solutions that must both increase total capacity while being cost effective. This requirement is pushing operators towards network disaggregation, where optical network infrastructure is built by mix and match different physical layer technologies from different vendors. In such a novel context, every equipment and transmission technique at the physical layer impacts the overall network behavior. Hence, methods giving quantitative evaluations of individual merit of physical layer equipment at network level are a firm request during network design phases as well as during network lifetime. Therefore, physical layer awareness in network design and operation is fundamental to fairly assess the potentialities, and exploit the capabilities of different technologies. From this perspective, propagation impairments modeling is essential. In this work propagation impairments in transparent optical networks are summarized, with a special focus on nonlinear effects. The Gaussian Noise model is reviewed, then extended for wideband scenarios. To do so, the impact of polarization mode dispersion on nonlinear interference (NLI) generation is assessed for the first time through simulation, showing its negligible impact on NLI generation. Thanks to this result, the Gaussian Noise model is generalized to assess the impact of space and frequency amplitude variations along the fiber, mainly due to stimulated Raman scattering, on NLI generation. The proposed Generalized GN (GGN) model is experimentally validated on a setup with commercial linecards, compared with other modeling options, and an example of application is shown. Then, network-level power optimization strategies are discussed, and the Locally Optimization Global Optimization (LOGO) approach reviewed. After that, a novel framework of analysis for optical networks that leverages detailed propagation impairment modeling called the Statistical Network Assessment Process (SNAP) is presented. SNAP is motivated by the need of having a general framework to assess the impact of different physical layer technologies on network performance, without relying on rigid optimization approaches, that are not well-suited for technology comparison. Several examples of applications of SNAP are given, including comparisons of transceivers, amplifiers and node technologies. SNAP is also used to highlight topological bottlenecks in progressively loaded network scenarios and to derive possible solutions for them. The final work presented in this thesis is related to the implementation of a vendor agnostic quality of transmission estimator for multi-vendor optical networks developed in the context of the Physical Simulation Environment group of the Telecom Infra Project. The implementation of a module based on the GN model is briefly described, then results of a multi-vendor experimental validation performed in collaboration with Microsoft are shown

Architecting a One-to-many Traffic-Aware and Secure Millimeter-Wave Wireless Network-in-Package Interconnect for Multichip Systems

With the aggressive scaling of device geometries, the yield of complex Multi Core Single Chip(MCSC) systems with many cores will decrease due to the higher probability of manufacturing defects especially, in dies with a large area. Disintegration of large System-on-Chips(SoCs) into smaller chips called chiplets has shown to improve the yield and cost of complex systems. Therefore, platform-based computing modules such as embedded systems and micro-servers have already adopted Multi Core Multi Chip (MCMC) architectures overMCSC architectures. Due to the scaling of memory intensive parallel applications in such systems, data is more likely to be shared among various cores residing in different chips resulting in a significant increase in chip-to-chip traffic, especially one-to-many traffic. This one-to-many traffic is originated mainly to maintain cache-coherence between many cores residing in multiple chips. Besides, one-to-many traffics are also exploited by many parallel programming models, system-level synchronization mechanisms, and control signals. How-ever, state-of-the-art Network-on-Chip (NoC)-based wired interconnection architectures do not provide enough support as they handle such one-to-many traffic as multiple unicast trafficusing a multi-hop MCMC communication fabric. As a result, even a small portion of such one-to-many traffic can significantly reduce system performance as traditional NoC-basedinterconnect cannot mask the high latency and energy consumption caused by chip-to-chipwired I/Os. Moreover, with the increase in memory intensive applications and scaling of MCMC systems, traditional NoC-based wired interconnects fail to provide a scalable inter-connection solution required to support the increased cache-coherence and synchronization generated one-to-many traffic in future MCMC-based High-Performance Computing (HPC) nodes. Therefore, these computation and memory intensive MCMC systems need an energy-efficient, low latency, and scalable one-to-many (broadcast/multicast) traffic-aware interconnection infrastructure to ensure high-performance. Research in recent years has shown that Wireless Network-in-Package (WiNiP) architectures with CMOS compatible Millimeter-Wave (mm-wave) transceivers can provide a scalable, low latency, and energy-efficient interconnect solution for on and off-chip communication. In this dissertation, a one-to-many traffic-aware WiNiP interconnection architecture with a starvation-free hybrid Medium Access Control (MAC), an asymmetric topology, and a novel flow control has been proposed. The different components of the proposed architecture are individually one-to-many traffic-aware and as a system, they collaborate with each other to provide required support for one-to-many traffic communication in a MCMC environment. It has been shown that such interconnection architecture can reduce energy consumption and average packet latency by 46.96% and 47.08% respectively for MCMC systems. Despite providing performance enhancements, wireless channel, being an unguided medium, is vulnerable to various security attacks such as jamming induced Denial-of-Service (DoS), eavesdropping, and spoofing. Further, to minimize the time-to-market and design costs, modern SoCs often use Third Party IPs (3PIPs) from untrusted organizations. An adversary either at the foundry or at the 3PIP design house can introduce a malicious circuitry, to jeopardize an SoC. Such malicious circuitry is known as a Hardware Trojan (HT). An HTplanted in the WiNiP from a vulnerable design or manufacturing process can compromise a Wireless Interface (WI) to enable illegitimate transmission through the infected WI resulting in a potential DoS attack for other WIs in the MCMC system. Moreover, HTs can be used for various other malicious purposes, including battery exhaustion, functionality subversion, and information leakage. This information when leaked to a malicious external attackercan reveals important information regarding the application suites running on the system, thereby compromising the user profile. To address persistent jamming-based DoS attack in WiNiP, in this dissertation, a secure WiNiP interconnection architecture for MCMC systems has been proposed that re-uses the one-to-many traffic-aware MAC and existing Design for Testability (DFT) hardware along with Machine Learning (ML) approach. Furthermore, a novel Simulated Annealing (SA)-based routing obfuscation mechanism was also proposed toprotect against an HT-assisted novel traffic analysis attack. Simulation results show that,the ML classifiers can achieve an accuracy of 99.87% for DoS attack detection while SA-basedrouting obfuscation could reduce application detection accuracy to only 15% for HT-assistedtraffic analysis attack and hence, secure the WiNiP fabric from age-old and emerging attacks

Function Implementation in a Multi-Gate Junctionless FET Structure

Title from PDF of title page, viewed September 18, 2023Dissertation advisor: Mostafizur RahmanVitaIncludes bibliographical references (pages 95-117)Dissertation (Ph.D.)--Department of Computer Science and Electrical Engineering, Department of Physics and Astronomy. University of Missouri--Kansas City, 2023This dissertation explores designing and implementing a multi-gate junctionless field-effect transistor (JLFET) structure and its potential applications beyond conventional devices. The JLFET is a promising alternative to conventional transistors due to its simplified fabrication process and improved electrical characteristics. However, previous research has focused primarily on the device's performance at the individual transistor level, neglecting its potential for implementing complex functions. This dissertation fills this research gap by investigating the function implementation capabilities of the JLFET structure and proposing novel circuit designs based on this technology. The first part of this dissertation presents a comprehensive review of the existing literature on JLFETs, including their fabrication techniques, operating principles, and performance metrics. It highlights the advantages of JLFETs over traditional metal-oxide-semiconductor field-effect transistors (MOSFETs) and discusses the challenges associated with their implementation. Additionally, the review explores the limitations of conventional transistor technologies, emphasizing the need for exploring alternative device architectures. Building upon the theoretical foundation, the dissertation presents a detailed analysis of the multi-gate JLFET structure and its potential for realizing advanced functions. The study explores the impact of different design parameters, such as channel length, gate oxide thickness, and doping profiles, on the device performance. It investigates the trade-offs between power consumption, speed, and noise immunity, and proposes design guidelines for optimizing the function implementation capabilities of the JLFET. To demonstrate the practical applicability of the JLFET structure, this dissertation introduces several novel circuit designs based on this technology. These designs leverage the unique characteristics of the JLFET, such as its steep subthreshold slope and improved on/off current ratio, to implement complex functions efficiently. The proposed circuits include arithmetic units, memory cells, and digital logic gates. Detailed simulations and analyses are conducted to evaluate their performance, power consumption, and scalability. Furthermore, this dissertation explores the potential of the JLFET structure for emerging technologies, such as neuromorphic computing and bioelectronics. It investigates how the JLFET can be employed to realize energy-efficient and biocompatible devices for applications in artificial intelligence and biomedical engineering. The study investigates the compatibility of the JLFET with various materials and substrates, as well as its integration with other functional components. In conclusion, this dissertation contributes to the field of nanoelectronics by providing a comprehensive investigation into the function implementation capabilities of the multi-gate JLFET structure. It highlights the potential of this device beyond its individual transistor performance and proposes novel circuit designs based on this technology. The findings of this research pave the way for the development of advanced electronic systems that are more energy-efficient, faster, and compatible with emerging applications in diverse fields.Introduction -- Literature review -- Crosstalk principle -- Experiment of crosstalk -- Device architecture -- Simulation & results -- Conclusio

Optical performance monitoring in optical packet-switched networks

Para poder satisfacer la demanda de mayores anchos de banda y los requisitos de los nuevos servicios, se espera que se produzca una evolución de las redes ópticas hacia arquitecturas reconfigurables dinámicamente. Esta evolución subraya la importancia de ofrecer soluciones en la que la escalabilidad y la flexibilidad sean las principales directrices. De acuerdo a estas características, las redes ópticas de conmutación de paquetes (OPS) proporcionan altas capacidades de transmisión, eficiencia en ancho de banda y excelente flexibilidad, además de permitir el procesado de los paquetes directamente en la capa óptica. En este escenario, la solución all-optical label switching (AOLS) resuelve el cuello de botella impuesto por los nodos que realizan el procesado en el dominio eléctrico. A pesar de los progresos en el campo del networking óptico, las redes totalmente ópticas todavía se consideran una solución lejana . Por tanto, es importante desarrollar un escenario de migración factible y gradual desde las actuales redes ópticas basadas en la conmutación de circuitos (OCS). Uno de los objetivos de esta tesis se centra en la propuesta de escenarios de migración basados en redes híbridas que combinan diferentes tecnologías de conmutación. Además, se analiza la arquitectura de una red OPS compuesta de nodos que incorporan nuevas funcionalidades relacionadas con labores de monitorización y esquemas de recuperación. Las redes ópticas permiten mejorar la transparencia de la red, pero a costa de aumentar la complejidad de las tareas de gesión. En este escenario, la monitorización óptica de prestaciones (OPM) surge como una tecnología capaz de facilitar la administración de las redes OPS, en las que cada paquete sigue su propia ruta en la red y sufre un diferente nivel de degradación al llegar a su destino. Aquí reside la importancia de OPM para garantizar los requisitos de calidad de cada paquete.Vilar Mateo, R. (2010). Optical performance monitoring in optical packet-switched networks [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/8926Palanci