140 research outputs found
SNRA: A Spintronic Neuromorphic Reconfigurable Array for In-Circuit Training and Evaluation of Deep Belief Networks
In this paper, a spintronic neuromorphic reconfigurable Array (SNRA) is
developed to fuse together power-efficient probabilistic and in-field
programmable deterministic computing during both training and evaluation phases
of restricted Boltzmann machines (RBMs). First, probabilistic spin logic
devices are used to develop an RBM realization which is adapted to construct
deep belief networks (DBNs) having one to three hidden layers of size 10 to 800
neurons each. Second, we design a hardware implementation for the contrastive
divergence (CD) algorithm using a four-state finite state machine capable of
unsupervised training in N+3 clocks where N denotes the number of neurons in
each RBM. The functionality of our proposed CD hardware implementation is
validated using ModelSim simulations. We synthesize the developed Verilog HDL
implementation of our proposed test/train control circuitry for various DBN
topologies where the maximal RBM dimensions yield resource utilization ranging
from 51 to 2,421 lookup tables (LUTs). Next, we leverage spin Hall effect
(SHE)-magnetic tunnel junction (MTJ) based non-volatile LUTs circuits as an
alternative for static random access memory (SRAM)-based LUTs storing the
deterministic logic configuration to form a reconfigurable fabric. Finally, we
compare the performance of our proposed SNRA with SRAM-based configurable
fabrics focusing on the area and power consumption induced by the LUTs used to
implement both CD and evaluation modes. The results obtained indicate more than
80% reduction in combined dynamic and static power dissipation, while achieving
at least 50% reduction in device count.Comment: 8 page
Design of a Low Voltage Analog-to-Digital Converter using Voltage Controlled Stochastic Switching of Low Barrier Nanomagnets
The inherent stochasticity in many nano-scale devices makes them prospective
candidates for low-power computations. Such devices have been demonstrated to
exhibit probabilistic switching between two stable states to achieve stochastic
behavior. Recently, superparamagnetic nanomagnets (having low energy barrier EB
1kT) have shown promise of achieving stochastic switching at GHz rates,
with very low currents. On the other hand, voltage-controlled switching of
nanomagnets through the Magneto-electric (ME) effect has shown further
improvements in energy efficiency. In this simulation paper, we first analyze
the stochastic switching characteristics of such super-paramagnetic nanomagnets
in a voltage-controlled spintronic device. We study the influence of external
bias on the switching behavior. Subsequently, we show that our proposed device
leverages the voltage controlled stochasticity in performing low-voltage 8-bit
analog to digital conversions. This eliminates the need for comparators, unlike
the Complementary Metal-Oxide Semiconductor (CMOS)-based flash
Analog-to-Digital converters (ADC). This device allows for a simple and compact
design which can potentially be applied in implementing sensors which desire
low voltage conversions.Comment: 11 pages, 6 figure
Hardware implementation of Bayesian network building blocks with stochastic spintronic devices
Bayesian networks are powerful statistical models to understand causal
relationships in real-world probabilistic problems such as diagnosis,
forecasting, computer vision, etc. For systems that involve complex causal
dependencies among many variables, the complexity of the associated Bayesian
networks become computationally intractable. As a result, direct hardware
implementation of these networks is one promising approach to reducing power
consumption and execution time. However, the few hardware implementations of
Bayesian networks presented in literature rely on deterministic CMOS devices
that are not efficient in representing the inherently stochastic variables in a
Bayesian network. This work presents an experimental demonstration of a
Bayesian network building block implemented with naturally stochastic
spintronic devices. These devices are based on nanomagnets with perpendicular
magnetic anisotropy, initialized to their hard axes by the spin orbit torque
from a heavy metal under-layer utilizing the giant spin Hall effect, enabling
stochastic behavior. We construct an electrically interconnected network of two
stochastic devices and manipulate the correlations between their states by
changing connection weights and biases. By mapping given conditional
probability tables to the circuit hardware, we demonstrate that any two node
Bayesian networks can be implemented by our stochastic network. We then present
the stochastic simulation of an example case of a four node Bayesian network
using our proposed device, with parameters taken from the experiment. We view
this work as a first step towards the large scale hardware implementation of
Bayesian networks.Comment: 9 pages, 4 figure
Probabilistic Deep Spiking Neural Systems Enabled by Magnetic Tunnel Junction
Deep Spiking Neural Networks are becoming increasingly powerful tools for
cognitive computing platforms. However, most of the existing literature on such
computing models are developed with limited insights on the underlying hardware
implementation, resulting in area and power expensive designs. Although several
neuromimetic devices emulating neural operations have been proposed recently,
their functionality has been limited to very simple neural models that may
prove to be inefficient at complex recognition tasks. In this work, we venture
into the relatively unexplored area of utilizing the inherent device
stochasticity of such neuromimetic devices to model complex neural
functionalities in a probabilistic framework in the time domain. We consider
the implementation of a Deep Spiking Neural Network capable of performing high
accuracy and low latency classification tasks where the neural computing unit
is enabled by the stochastic switching behavior of a Magnetic Tunnel Junction.
Simulation studies indicate an energy improvement of over a baseline
CMOS design in technology.Comment: The article will appear in a future issue of IEEE Transactions on
Electron Device
Spin torque building blocks
The discovery of the spin torque effect has made magnetic nanodevices
realistic candidates for active elements of memory devices and applications.
Magnetoresistive effects allow the read-out of increasingly small magnetic
bits, and the spin torque provides an efficient tool to manipulate - precisely,
rapidly and at low energy cost - the magnetic state, which is in turn the
central information medium of spintronic devices. By keeping the same magnetic
stack, but by tuning a device's shape and bias conditions, the spin torque can
be engineered to build a variety of advanced magnetic nanodevices. Here we show
that by assembling these nanodevices as building blocks with different
functionalities, novel types of computing architectures can be envisisaged. We
focus in particular on recent concepts such as magnonics and spintronic neural
networks
The promise of spintronics for unconventional computing
Novel computational paradigms may provide the blueprint to help solving the
time and energy limitations that we face with our modern computers, and provide
solutions to complex problems more efficiently (with reduced time, power
consumption and/or less device footprint) than is currently possible with
standard approaches. Spintronics offers a promising basis for the development
of efficient devices and unconventional operations for at least three main
reasons: (i) the low-power requirements of spin-based devices, i.e., requiring
no standby power for operation and the possibility to write information with
small dynamic energy dissipation, (ii) the strong nonlinearity, time
nonlocality, and/or stochasticity that spintronic devices can exhibit, and
(iii) their compatibility with CMOS logic manufacturing processes. At the same
time, the high endurance and speed of spintronic devices means that they can be
rewritten or reconfigured frequently over the lifetime of a circuit, a feature
that is essential in many emerging computing concepts. In this perspective, we
will discuss how spintronics may aid in the realization of efficient devices
primarily based on magnetic tunnel junctions and how those devices can impact
in the development of three unconventional computing paradigms, namely,
reservoir computing, probabilistic computing and memcomputing that in our
opinion may be used to address some limitations of modern computers, providing
a realistic path to intelligent hybrid CMOS-spintronic systems.Comment: 18 pages and 4 figure
From materials to systems: a multiscale analysis of nanomagnetic switching
With the increasing demand for low-power electronics, nanomagnetic devices
have emerged as strong potential candidates to complement present day
transistor technology. A variety of novel switching effects such as spin torque
and giant spin Hall offer scalable ways to manipulate nano-sized magnets.
However, the low intrinsic energy cost of switching spins is often compromised
by the energy consumed in the overhead circuitry in creating the necessary
switching fields. Scaling brings in added concerns such as the ability to
distinguish states (readability) and to write information without spontaneous
backflips (reliability). A viable device must ultimately navigate a complex
multi-dimensional material and design space defined by volume, energy budget,
speed and a target read-write-retention error. In this paper, we review the
major challenges facing nanomagnetic devices and present a multi-scale
computational framework to explore possible innovations at different levels
(material, device, or circuit), along with a holistic understanding of their
overall energy-delay-reliability tradeoff.Comment: Submitted to Journal of Computational Electronics Special Issue
"Computational Electronics of Emerging Memory Elements
Weighted p-bits for FPGA implementation of probabilistic circuits
Probabilistic spin logic (PSL) is a recently proposed computing paradigm
based on unstable stochastic units called probabilistic bits (p-bits) that can
be correlated to form probabilistic circuits (p-circuits). These p-circuits can
be used to solve problems of optimization, inference and also to implement
precise Boolean functions in an "inverted" mode, where a given Boolean circuit
can operate in reverse to find the input combinations that are consistent with
a given output. In this paper we present a scalable FPGA implementation of such
invertible p-circuits. We implement a "weighted" p-bit that combines stochastic
units with localized memory structures. We also present a generalized tile of
weighted p-bits to which a large class of problems beyond invertible Boolean
logic can be mapped, and how invertibility can be applied to interesting
problems such as the NP-complete Subset Sum Problem by solving a small instance
of this problem in hardware
Spintronics based Stochastic Computing for Efficient Bayesian Inference System
Bayesian inference is an effective approach for solving statistical learning
problems especially with uncertainty and incompleteness. However, inference
efficiencies are physically limited by the bottlenecks of conventional
computing platforms. In this paper, an emerging Bayesian inference system is
proposed by exploiting spintronics based stochastic computing. A stochastic
bitstream generator is realized as the kernel components by leveraging the
inherent randomness of spintronics devices. The proposed system is evaluated by
typical applications of data fusion and Bayesian belief networks. Simulation
results indicate that the proposed approach could achieve significant
improvement on inference efficiencies in terms of power consumption and
inference speed.Comment: accepted by ASPDAC 2018 conferenc
Stochastic Spin-Orbit Torque Devices as Elements for Bayesian Inference
Probabilistic inference from real-time input data is becoming increasingly
popular and may be one of the potential pathways at enabling cognitive
intelligence. As a matter of fact, preliminary research has revealed that
stochastic functionalities also underlie the spiking behavior of neurons in
cortical microcircuits of the human brain. In tune with such observations,
neuromorphic and other unconventional computing platforms have recently started
adopting the usage of computational units that generate outputs
probabilistically, depending on the magnitude of the input stimulus. In this
work, we experimentally demonstrate a spintronic device that offers a direct
mapping to the functionality of such a controllable stochastic switching
element. We show that the probabilistic switching of Ta/CoFeB/MgO
heterostructures in presence of spin-orbit torque and thermal noise can be
harnessed to enable probabilistic inference in a plethora of unconventional
computing scenarios. This work can potentially pave the way for hardware that
directly mimics the computational units of Bayesian inference
- …