Shuttle GPS R/PA evaluation analysis and performance tradeoff study

Primary responsibility was understanding and analyzing the various GPS receiver functions as they relate to the shuttle environment. These receiver functions included acquisition properties of the sequential detector, acquisition and tracking properties of the various receiver phase locked loops, and the techniques of sequential receiver operation. In addition to these areas, support was provided in the areas of oscillator stability requirements, antenna management, and navigation filter requirements, including preposition aiding

GPS Carrier Tracking Loop Performance in the presence of Ionospheric Scintillations

The performance of several GPS carrier tracking loops is evaluated using wideband GPS data recorded during strong ionospheric scintillations. The aim of this study is to determine the loop structures and parameters that enable good phase tracking during the power fades and phase dynamics induced by scintillations. Constant-bandwidth and variable-bandwidth loops are studied using theoretical models, simulation, and tests with actual GPS signals. Constant-bandwidth loops with loop bandwidths near 15 Hz are shown to lose phase lock during scintillations. Use of the decision-directed discriminator reduces the carrier lock threshold by ∼1 dB relative to the arctangent and conventional Costas discriminators. A proposed variablebandwidth loop based on a Kalman filter reduces the carrier lock threshold by more than 7 dB compared to a 15-Hz constant-bandwidth loop. The Kalman filter-based strategy employs a soft-decision discriminator, explicitly models the effects of receiver clock noise, and optimally adapts the loop bandwidth to the carrier-to-noise ratio. In extensive simulation and in tests using actual wideband GPS data, the Kalman filter PLL demonstrates improved cycle slip immunity relative to constant bandwidth PLLs.Aerospace Engineering and Engineering Mechanic

Smart Power Grid Synchronization With Fault Tolerant Nonlinear Estimation

Effective real-time state estimation is essential for smart grid synchronization, as electricity demand continues to grow, and renewable energy resources increase their penetration into the grid. In order to provide a more reliable state estimation technique to address the problem of bad data in the PMU-based power synchronization, this paper presents a novel nonlinear estimation framework to dynamically track frequency, voltage magnitudes and phase angles. Instead of directly analyzing in abc coordinate frame, symmetrical component transformation is employed to separate the positive, negative, and zero sequence networks. Then, Clarke\u27s transformation is used to transform the sequence networks into the αβ stationary coordinate frame, which leads to system model formulation. A novel fault tolerant extended Kalman filter based real-time estimation framework is proposed for smart grid synchronization with noisy bad data measurements. Computer simulation studies have demonstrated that the proposed fault tolerant extended Kalman filter (FTEKF) provides more accurate voltage synchronization results than the extended Kalman filter (EKF). The proposed approach has been implemented with dSPACE DS1103 and National Instruments CompactRIO hardware platforms. Computer simulation and hardware instrumentation results have shown the potential applications of FTEKF in smart grid synchronization

A study of phase noise and jitter in submicron CMOS phase-locked loop circuits

Phase-locked loops (PLLs) are widely used in communication systems. With the continuously expanding of market for high speed, portable communication devices, low noise CMOS submicron integrated circuit designs of PLL for different applications are in large demand. In this dissertation, phase noise and jitter properties of PLL and its building blocks are investigated both at the physical and system levels. At the physical level, hot carrier effect in submicron MOSFETs has been considered. As one of the most dominant noise sources of PLL, the voltage-controlled oscillator (VCO) is considered when investigating the noise degradation induced by the hot carrier effect. Experimental results of jitter degradation due to hot carrier effects are presented for different ring oscillator types VCOs designed in 0.5 micron n-well CMOS technology. An increase in RMS jitter by 25% and 10% decrease in oscillation frequency of VCO can be observed after 4 hours hot carrier stress. The hot carrier induced noise degradation on PLL is also presented based on the performance degradation in VCO. Simulation results show 40% decrease in VCO gain after 4 hours stress and a 23% decrease in damping factor and loop bandwidth. Moreover, degradation on PLL noise performance includes a left shift peak in phase noise and a 17% increase in RMS jitter. At the system level, noise sources in a PLL system are investigated including the input reference noise, VCO noise and the frequency divider noise. Phase noise prediction method for PLL is developed. Experimental phase noise measurement results on 0.5 micron CMOS PLL systems based on different types of VCOs are in close agreement with the predicted phase noise. Therefore, the phase noise prediction method is verified. On the other hand, a 3 GHz adaptive bandwidth PLL based on LC-VCO is designed in 0.25 micron n-well CMOS technology to investigate the phase noise and jitter performance by varying the loop parameters. By considering the noise simulation results based on the adaptive bandwidth feature and the quality factor of the on-chip inductor, PLL loop parameters can be carefully chosen at the design phase to achieve an optimal noise performance

Models predicting the performance of IC component or PCB channel during electromagnetic interference

This dissertation is composed of three papers, which cover the prediction of the characteristics of jitter due to crosstalk and due to simultaneous switching noise, and covers susceptibility of delay locked loop (DLL) to electromagnetic interference. In the first paper, an improved tail-fit de-convolution method is proposed for characterizing the impact of deterministic jitter in the presence of random jitter. A Wiener filter de-convolution method is also presented for extracting the characteristics of crosstalk induced jitter from measurements of total jitter made when the crosstalk sources were and were not present. The proposed techniques are shown to work well both in simulations and in measurements of a high-speed link. In the second paper, methods are developed to predict the statistical distribution of timing jitter due to dynamic currents drawn by an integrated circuit (IC) and the resulting power supply noise on the PCB. Distribution of dynamic currents is found through vectorless methods. Results demonstrate the approach can rapidly determine the average and standard deviation of the power supply noise voltage and the peak jitter within 5~15% error, which is more than sufficient for predicting the performance impact on integrated circuits. In the third paper, a model is developed to predict the susceptibility of a DLL to electromagnetic noise on the power supply. With the proposed analytical noise transfer function, peak to peak jitter and cycle to cycle jitter at the DLL output can be estimated, which can be use to predict when soft failures will occur and to better understand how to fix these failures. Simulation and measurement results demonstrate the accuracy of the DLL delay model. --Abstract, page iv

CHO microRNA engineering is growing up : recent successes and future challenges

microRNAs with their ability to regulate complex pathways that control cellular behavior and phenotype have been proposed as potential targets for cell engineering in the context of optimization of biopharmaceutical production cell lines, specifically of Chinese Hamster Ovary cells. However, until recently, research was limited by a lack of genomic sequence information on this industrially important cell line. With the publication of the genomic sequence and other relevant data sets for CHO cells since 2011, the doors have been opened for an improved understanding of CHO cell physiology and for the development of the necessary tools for novel engineering strategies. In the present review we discuss both knowledge on the regulatory mechanisms of microRNAs obtained from other biological models and proof of concepts already performed on CHO cells, thus providing an outlook of potential applications of microRNA engineering in production cell lines

Planetary benchmarks

Design criteria and technology requirements for a system of radar reference devices to be fixed to the surfaces of the inner planets are discussed. Offshoot applications include the use of radar corner reflectors as landing beacons on the planetary surfaces and some deep space applications that may yield a greatly enhanced knowledge of the gravitational and electromagnetic structure of the solar system. Passive retroreflectors with dimensions of about 4 meters and weighing about 10 kg are feasible for use with orbiting radar at Venus and Mars. Earth-based observation of passive reflectors, however, would require very large and complex structures to be delivered to the surfaces. For Earth-based measurements, surface transponders offer a distinct advantage in accuracy over passive reflectors. A conceptual design for a high temperature transponder is presented. The design appears feasible for the Venus surface using existing electronics and power components