The "MIND" Scalable PIM Architecture

MIND (Memory, Intelligence, and Network Device) is an advanced parallel computer architecture for high performance computing and scalable embedded processing. It is a Processor-in-Memory (PIM) architecture integrating both DRAM bit cells and CMOS logic devices on the same silicon die. MIND is multicore with multiple memory/processor nodes on each chip and supports global shared memory across systems of MIND components. MIND is distinguished from other PIM architectures in that it incorporates mechanisms for efficient support of a global parallel execution model based on the semantics of message-driven multithreaded split-transaction processing. MIND is designed to operate either in conjunction with other conventional microprocessors or in standalone arrays of like devices. It also incorporates mechanisms for fault tolerance, real time execution, and active power management. This paper describes the major elements and operational methods of the MIND architecture

Optimizing construction of scheduled data flow graph for on-line testability

The objective of this work is to develop a new methodology for behavioural synthesis using a flow of synthesis, better suited to the scheduling of independent calculations and non-concurrent online testing. The traditional behavioural synthesis process can be defined as the compilation of an algorithmic specification into an architecture composed of a data path and a controller. This stream of synthesis generally involves scheduling, resource allocation, generation of the data path and controller synthesis. Experiments showed that optimization started at the high level synthesis improves the performance of the result, yet the current tools do not offer synthesis optimizations that from the RTL level. This justifies the development of an optimization methodology which takes effect from the behavioural specification and accompanying the synthesis process in its various stages. In this paper we propose the use of algebraic properties (commutativity, associativity and distributivity) to transform readable mathematical formulas of algorithmic specifications into mathematical formulas evaluated efficiently. This will effectively reduce the execution time of scheduling calculations and increase the possibilities of testability

Active-Routing: Parallelization and Scheduling of 3D-Memory Vault Computations

In an age where big data is more available than ever, new high-bandwidth, low-latency memory technology, such as Hybrid Memory Cubes (HMC), have extended into the third dimension to tighten the increasing gap between memory and CPU speeds. Processing power built into these new 3D memory technologies allows CPU cores to offload computations to memory, leading to recent interest in the design space of Processing-In-Memory (PIM) when several HMC units are chained together in a network. Using topology-oblivious Active-Routing technique in such a network, computations like dot products over a large set of data can be distributed across a virtual "tree" such that partial results are compounded at every branch "on the way" back to the CPU. We propose driving performance of Active-Routing by offloading computations to memory with high throughput offloading techniques. We present Vault-Level Parallelism to further parallelize computations by strategically dispatching computations to DRAM vault controllers within each HMC. Our new implementation distributes the resources of Active-Routing to each of the vault controllers in the HMC so as to reduce contention for compute resources. We simulate our implemented techniques and assess their performance using previously developed micro-benchmarks and a widely accepted benchmark in scientific computing. The evaluation results show an increase in overall data throughout the Active-Routing Tree with an aggregate 23x speedup

Policy-Based Immunization Framework for MANET

Mobility is one of the most important driving forces of hyper-interconnected world that we are living in. Mobile computing devices are becoming smaller, more ubiquitous and simultaneously providing more computing power. Various mobile devices in diff rent sizes with high computing power cause the emergence of new type of networks\u27 applications. Researchers in conferences, soldiers in battlefields, medics in rescue missions, and drivers in busy high- ways can perform more efficiently if they can be connected to each other and aware of the environment they are interacting with. In all mentioned scenarios, the major barrier to have an interconnected collaborative environment is the lack of infrastructure. Mobile Ad hoc Networks (MANETs) are very promising to be able to handle this challenge. In recent years, extensive research has been done on MANETs in order to deliver secure and reliable network services in an infrastructure-less environment. MANETs usually deal with dynamic network topologies and utilize wireless technologies, they are very susceptible to different security attacks targeting different network layers. Combining policy-based management concepts and trust evaluation techniques in more granular level than current trust management frameworks can lead to interesting results toward more secure and reliable MANETs

A model-driven approach for facilitating user-friendly design of complex event patterns

Complex Event Processing (CEP) is an emerging technology which allows us to efficiently process and correlate huge amounts of data in order to discover relevant or critical situations of interest (complex events) for a specific domain. This technology requires domain experts to define complex event patterns, where the conditions to be detected are specified by means of event processing languages. However, these experts face the handicap of defining such patterns with editors which are not user-friendly enough. To solve this problem, a model-driven approach for facilitating user-friendly design of complex event patterns is proposed and developed in this paper. Besides, the proposal has been applied to different domains and several event processing languages have been compared. As a result, we can affirm that the presented approach is independent both of the domain where CEP technology has to be applied to and of the concrete event processing language required for defining event patterns

Compiler-Driven Power Optimizations in the Register File of Processor-Based Systems

The complexity of the register file is currently one of the main factors on determining the cycle time of high performance wide-issue microprocessors due to its access time and size. Both parameters are directly related to the number of read and write ports of the register file and can be managed from a code compilation-level. Therefore, it is a priority goal to reduce this complexity in order to allow the efficient implementation of complex superscalar machines. This work presents a modified register assignment and a banked architecture which efficiently reduce the number of required ports. Also, the effect of the loop unrollling optimization performed by the compiler is analyzed and several power-efficient modifications to this mechanism are proposed. Both register assignment and loop unrolling mechanisms are modified to improve the energy savings while avoiding a hard performance impact

Sustainable supply chain management needs sustainable logistics services. The strategic role played by logistics service providers

Purpose – The purpose of this research is to examine the concept of sustainable service co-creation in triadic business relationships in logistics and supply chain management. More companies seek to develop sustainable solutions that would not be sustainable exclusively for themselves but for the supply chain they belong to. In doing that – especially when dealing with services – they may need the external support from logistics service providers (LSPs). This paper aims to explore the innovative initiatives undertaken by LSPs in triadic relationship management with their customers and suppliers while co-creating sustainable services along the supply chain. Design/methodology/approach – To investigate the research question, a systematic literature review and empirical exploratory investigation through case study will be conducted adopting the qualitative methodology, to explore trends and evolving paradigms. Findings – A literature review conducted in this paper enriches existing literature through an integration of sustainability in a viable system approach and logistics service provision, in particular, it investigates the ways in which sustainability is achieved. It is assumed that the triadic relationship among an LSP and its customers and suppliers requires significant modifications in collaboration and an innovative approach in operating procedures. Research limitations/implications – This paper is an exploratory study and limited in its scope to an example of a relationship that focuses mainly on three actors: the supplier, the LSP and the customer. However, it could be extended in terms of numbers of case studies investigated. Practical implications – The implications arising from the literature and the empirical research offer a range of current sustainable practices in the services sector. This could be a starting point for other research and company activities. Originality/value – There is little research that addresses the issue of sustainability and logistics service providers simultaneously, hence the present paper is meant to fill the gap by providing a foundation which actors of different supply chains could use as a benchmark. This study gives evidence of how logistics services may contribute to sustainable development. Key words – sustainable supply chain management, logistics service providers, viable system approach, co-creation, business relationship managemen

Door-to-Door Mobility Integrators as Keystone Organizations of Smart Ecosystems: Resources and Value Co-Creation – A Literature Review

Cities around the world face major mobility-related challenges, such as traffic congestion and air pollution. One primary cause of these challenges is the decision of citizens to use their private car instead of alternative mobility services such as public transport, car-sharing and bike-sharing. Technological progress offers new possibilities to address these challenges by making alternative mobility services easier and more convenient to use. This paper focuses on door-to-door (D2D) mobility integrators, which aim to offer citizens seamless D2D transport by packaging alternative mobility services. To better understand the practical barriers D2D mobility integrators face, this interdisciplinary literature review provides a holistic picture of their operand and operant resources, revealing significant gaps in our understanding of their capability to attract actors to their ecosystem and to manage value co-creation. Based on these gaps, we identify a potential avenue of future research

Lightweight register file caching in collector units for GPUs

Modern GPUs benefit from a sizable Register File (RF) to provide fine-grained thread switching. As the RF is huge and accessed frequently, it consumes a considerable share of the dynamic energy of the GPU. Designing a large, high-throughput RF with low energy consumption and area for GPUs is challenging. In this paper, an energy-efficient hierarchical RF design for GPUs, called Malekeh, is introduced. Malekeh keeps registers in energy-efficient small caches and maximizes cache efficacy by using lightweight policies and supporting adaptive algorithms. The policies’ effectiveness is improved by leveraging register reuse distance information provided by the compiler as a hint. Malekeh reduces the RF reads by 48.5% and dynamic energy by 29.1%. It also improves performance by 9.6% with a negligible overhead of 0.04% in the area.This work has been supported by the CoCoUnit ERC Advanced Grant of the EU’s Horizon 2020 program (grant No 833057), the Spanish State Research Agency (MCIN/AEI) under grant PID2020- 113172RB-I00, and the ICREA Academia program.Peer ReviewedPostprint (author's final draft