408 research outputs found

    Data Conversion Within Energy Constrained Environments

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    Within scientific research, engineering, and consumer electronics, there is a multitude of new discrete sensor-interfaced devices. Maintaining high accuracy in signal quantization while staying within the strict power-budget of these devices is a very challenging problem. Traditional paths to solving this problem include researching more energy-efficient digital topologies as well as digital scaling.;This work offers an alternative path to lower-energy expenditure in the quantization stage --- content-dependent sampling of a signal. Instead of sampling at a constant rate, this work explores techniques which allow sampling based upon features of the signal itself through the use of application-dependent analog processing. This work presents an asynchronous sampling paradigm, based off the use of floating-gate-enabled analog circuitry. The basis of this work is developed through the mathematical models necessary for asynchronous sampling, as well the SPICE-compatible models necessary for simulating floating-gate enabled analog circuitry. These base techniques and circuitry are then extended to systems and applications utilizing novel analog-to-digital converter topologies capable of leveraging the non-constant sampling rates for significant sample and power savings

    ์‹ฌ์ „๋„ ๊ฐ์‹œ ๋ถ„์•ผ๋ฅผ ์œ„ํ•œ ์ €์ „๋ ฅ ์‹ ํ˜ธ ํŠนํ™”๋œ ์ถ•์ฐจ ๋น„๊ตํ˜• ์•„๋‚ ๋กœ๊ทธ-๋””์ง€ํ„ธ ๋ณ€ํ™˜๊ธฐ์˜ ์„ค๊ณ„

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    ํ•™์œ„๋…ผ๋ฌธ (๋ฐ•์‚ฌ)-- ์„œ์šธ๋Œ€ํ•™๊ต ๋Œ€ํ•™์› ๊ณต๊ณผ๋Œ€ํ•™ ์ „๊ธฐยท์ปดํ“จํ„ฐ๊ณตํ•™๋ถ€, 2017. 8. ๊น€์ˆ˜ํ™˜.Electrocardiography is an indispensable tool employed for diagnosis of cardiovascular diseases. When electrocardiograms (ECGs) need to be monitored for a long time, e.g. to diagnose arrhythmia, a device has to be worn or implanted under the skin, which requires low energy consumption. Successive approximation register analog-to-digital converters (SAR ADCs) have been especially preferred in low power applications, while the recent trend of ADC designs shows that the SAR ADCs find a much wide range of applications, and are the most versatile ADC architecture. The subject of the dissertation is the design of a signal-specific SAR ADC scheme that reduces the power consumption by exploiting the characteristics of the input signal of a particular type whose signal activity is low on average and dichotomous, as best exemplified by ECGs. This dissertation presents a 1.8-V 10-bit 1-kS/s low-power SAR ADC with the proposed signal-specific switching algorithm. The proposed adaptive switching algorithm has two operation modes suitable for the dichotomous activity of the ECG: full switching mode that resolves the full range of the input as an ordinary SAR ADC, and reduced switching mode that assumes 5 MSBs will not change and samples just the rest LSB portion and resolves it in 5 bitcycles. The reduced number of bitcycles yields saving in switching power consumption. For smooth mode change adaptive to the input signal activity, an additional function in each mode, viz., MSBs tracking in full switching mode and LSBs extrapolation in reduced switching mode, runs concurrently with the respective main operation. A behavioral model of the proposed SAR ADC with the segmented capacitor digital-to-analog converter (CDAC) topology was created in MATLAB and was used in the tests, which verified the function and effectiveness of the adaptive switching algorithm. The model describes the evolution of all internal node voltages in the CDAC by each switching action, from which the charge variation in each capacitor and the switching energy consumption can be computed. The model was extensively used for the development and analysis of the idea. The 5-bit size of the MSB section was determined from the simulation results with the behavioral model. A prototype chip was fabricated in 0.18-ฮผm CMOS technology. Measurements with an ECG type input proved the suitability of the adaptive switching for ECG monitoring. The power reduction by the adaptive switching in each of comparator, logic, and DAC power domains was calculated from the measurements of both cases of the adaptive-switching and fixed-full-switching operations, the latter of which is equivalent to the conventional SAR ADC operation. It achieved a reduction in comparator power consumption by 39%. The DAC power, i.e. the switching power consumed in the CDAC, achieved a reduction by 1.28 nW, which is close to the result of the behavioral model simulation. The reduction in the logic power domain was 12%. In terms of total power consumption, the adaptive switching consumed 91.02 nW while the fixed full switching consumed 107.51 nW. The reduction corresponds to 15.3% in proportion. In addition, the intrinsic performance of the ADC was measured using a sinusoidal input. It achieved a signal-to-noise-and-distortion ratio of 56.24 dB and a spurious-free dynamic range of 62.00 dB. The maximum differential nonlinearity of +0.39/โˆ’1 LSBs and maximum integral nonlinearity of +0.86/โˆ’1.5 LSBs were measured. The main source of the nonlinearity is the capacitor mismatch in the CDAC.์‹ฌ์ „๋„๋Š” ์‹ฌํ˜ˆ๊ด€๊ณ„ ์งˆํ™˜์˜ ์ง„๋‹จ์„ ์œ„ํ•œ ์ค‘์š”ํ•œ ์ž๋ฃŒ๋กœ์„œ ๊ฐ์‹œ ๋ฐ ๊ธฐ๋ก๋œ๋‹ค. ๋•Œ๋กœ ๋ถ€์ •๋งฅ ์ง„๋‹จ ๋“ฑ์„ ์œ„ํ•˜์—ฌ ์‹ฌ์ „๋„๋ฅผ ์˜ค๋žœ ์‹œ๊ฐ„ ๊ด€์ฐฐํ•ด์•ผ ํ•  ๊ฒฝ์šฐ, ์ฐฉ์šฉ ๊ฐ€๋Šฅํ•œ(์›จ์–ด๋Ÿฌ๋ธ”) ์žฅ๋น„๋‚˜ ์ฒด๋‚ด์— ์ด์‹ํ•  ์ˆ˜ ์žˆ๋Š” ์žฅ๋น„๋ฅผ ์‚ฌ์šฉํ•ด์•ผ ํ•˜๋Š”๋ฐ, ์ด๋“ค์€ ์ „๋ ฅ ์†Œ๋น„๊ฐ€ ์ ์–ด์•ผ ํ•œ๋‹ค. ์ถ•์ฐจ ๋น„๊ตํ˜• ์•„๋‚ ๋กœ๊ทธ-๋””์ง€ํ„ธ ๋ณ€ํ™˜๊ธฐ(SAR ADC)๋Š” ์ €์ „๋ ฅ ์‘์šฉ ๋ถ„์•ผ์—์„œ ์ฃผ๋กœ ์„ ํ˜ธํ•œ ๊ตฌ์กฐ์˜€์œผ๋‚˜ ์ตœ๊ทผ ์•„๋‚ ๋กœ๊ทธ-๋””์ง€ํ„ธ ๋ณ€ํ™˜๊ธฐ ์„ค๊ณ„์˜ ์ถ”์„ธ๋Š” SAR ADC๊ฐ€ ํ›จ์”ฌ ๋„“์€ ์‘์šฉ ๋ถ„์•ผ์— ์ ์šฉ ๊ฐ€๋Šฅํ•˜๋ฉฐ ๊ฐ€์žฅ ๋„“์€ ๋ฒ”์šฉ์„ฑ์„ ๊ฐ€์ง„ ๊ตฌ์กฐ์ž„์„ ๋ณด์—ฌ์ค€๋‹ค. ๋ณธ ๋…ผ๋ฌธ์˜ ์ฃผ์ œ๋Š” ์‹ฌ์ „๋„ ์‹ ํ˜ธ์ฒ˜๋Ÿผ ์–‘๋ถ„๋œ ์‹ ํ˜ธ ํ™œ์„ฑ๋„๋ฅผ ๊ฐ€์ง€๋ฉด์„œ ํ‰๊ท  ์‹ ํ˜ธ ํ™œ์„ฑ๋„๋Š” ๋‚ฎ์€ ์œ ํ˜•์˜ ์‹ ํ˜ธ๋ฅผ ๋Œ€์ƒ์œผ๋กœ, ์ด ํŠน์„ฑ์„ ์ด์šฉํ•˜์—ฌ ์ „๋ ฅ์˜ ์†Œ๋น„๋ฅผ ๋‚ฎ์ถ”๋Š” ์‹ ํ˜ธ ํŠนํ™”๋œ ์Šค์œ„์นญ ๊ธฐ๋ฒ•์„ ์ ์šฉํ•œ SAR ADC ์„ค๊ณ„์ด๋‹ค. ๋ณธ ๋…ผ๋ฌธ์—์„œ๋Š” ์‹ ํ˜ธ ํŠนํ™”๋œ ๊ธฐ๋ฒ•์„ ์ ์šฉํ•œ 1.8V, 10 bit, 1kS/s์˜ ์ €์ „๋ ฅ SAR ADC ์„ค๊ณ„๋ฅผ ์ œ์‹œํ•œ๋‹ค. ์ œ์•ˆํ•˜๋Š” ์ ์‘ํ˜• ์Šค์œ„์นญ ๊ธฐ๋ฒ•์€ ECG์˜ ์–‘๋ถ„๋œ ์‹ ํ˜ธ ํ™œ์„ฑ๋„ ํŠน์„ฑ์— ๋งž์ถ”์–ด, ์ผ๋ฐ˜์ ์ธ SAR ADC์ฒ˜๋Ÿผ ์ž…๋ ฅ์˜ ์ „์ฒด ๋ฒ”์œ„๋ฅผ ์ฒ˜๋ฆฌํ•˜๋Š” full switching mode์™€, 5-bit MSB code๊ฐ€ ๋ณ€ํ•˜์ง€ ์•Š์„ ๊ฒƒ์ด๋ผ๋Š” ๊ฐ€์ •ํ•˜์— ๋‚˜๋จธ์ง€ LSB ๋ถ€๋ถ„๋งŒ ์ƒ˜ํ”Œ๋งํ•˜๊ณ  ์ฒ˜๋ฆฌํ•˜๋Š” reduced switching mode์˜ ๋‘ ๊ฐ€์ง€ ๋™์ž‘ ๋ชจ๋“œ๋ฅผ ๊ฐ€์ง„๋‹ค. ์ž…๋ ฅ ์‹ ํ˜ธ ํ™œ์„ฑ๋„์— ๋”ฐ๋ผ ์œ ์—ฐํ•˜๊ฒŒ ๋™์ž‘ ๋ชจ๋“œ๋ฅผ ์ „ํ™˜ํ•˜๊ธฐ ์œ„ํ•˜์—ฌ, full switching mode๋Š” MSBs tracking, reduced switching mode๋Š” LSBs extrapolation๋ผ๋Š” ๋ถ€๊ฐ€ ๊ธฐ๋Šฅ์ด ๊ฐ ๋ชจ๋“œ์˜ ์ฃผ ๊ธฐ๋Šฅ๊ณผ ํ•จ๊ป˜ ๋™์ž‘ํ•œ๋‹ค. ์ œ์•ˆํ•œ SAR ADC์˜ behavioral model์„ MATLAB์—์„œ ๋งŒ๋“ค์—ˆ๊ณ , ์ด๋ฅผ ์ด์šฉํ•œ ์—ฌ๋Ÿฌ ํ…Œ์ŠคํŠธ์—์„œ ์ ์‘ํ˜• ์Šค์œ„์นญ ๊ธฐ๋ฒ•์˜ ๊ธฐ๋Šฅ๊ณผ ํšจ๊ณผ๋ฅผ ๊ฒ€์ฆํ•˜์˜€๋‹ค. ์ด behavioral model์€ SAR ADC ๋‚ด์— ์žˆ๋Š” segmented CDAC์˜ ๋ชจ๋“  ๋‚ด๋ถ€ node ์ „์••์˜ ๋ณ€ํ™”๋ฅผ ๊ฐœ๋ณ„ ์Šค์œ„์นญ ๋™์ž‘์— ๋Œ€ํ•ด ๊ธฐ์ˆ ํ•˜๋ฏ€๋กœ, ์ด๋ฅผ ์ด์šฉํ•˜์—ฌ ๊ฐ ์บํŒจ์‹œํ„ฐ์— ์ €์žฅ๋œ ์ „ํ•˜์˜ ๋ณ€ํ™”๋Ÿ‰์ด๋‚˜ ์Šค์œ„์นญ ์—๋„ˆ์ง€ ์†Œ๋น„๋Ÿ‰์„ ๊ณ„์‚ฐํ•  ์ˆ˜ ์žˆ๋‹ค. ์ด model์„ idea ๊ฐœ๋ฐœ ๋ฐ ๋ถ„์„์— ๊ด‘๋ฒ”์œ„ํ•˜๊ฒŒ ์ด์šฉํ•˜์˜€๋‹ค. 0.18ฮผm CMOS ๊ณต์ •์—์„œ ์‹œ์ œํ’ˆ ์นฉ์„ ์ œ์ž‘ํ•˜์˜€๋‹ค. ์‹ฌ์ „๋„ ์œ ํ˜•์˜ ์ž…๋ ฅ ์‹ ํ˜ธ๋ฅผ ์ด์šฉํ•œ ์ธก์ •์„ ํ†ตํ•ด ์ œ์•ˆํ•œ ์ ์‘ํ˜• ์Šค์œ„์นญ ๊ธฐ๋ฒ•์ด ์‹ฌ์ „๋„ ๊ฐ์‹œ ๋ถ„์•ผ์— ์ ํ•ฉํ•จ์„ ์ฆ๋ช…ํ•˜์˜€๋‹ค. ์ œ์•ˆํ•œ ๊ธฐ๋ฒ•์œผ๋กœ ์–ป์–ด์ง€๋Š” ADC์˜ ์ „๋ ฅ ๊ฐ์†Œ๋Š” ์ œ์•ˆํ•œ ์ ์‘ํ˜• ์Šค์œ„์นญ์œผ๋กœ ๋™์ž‘ํ•œ ๊ฒฝ์šฐ์™€ full switching mode๋กœ ๊ณ ์ •๋œ ๊ฒฝ์šฐ(๊ธฐ์กด์˜ SAR ADC ๋™์ž‘์— ํ•ด๋‹น)์—์„œ ๋น„๊ต๊ธฐ, ๋…ผ๋ฆฌ ํšŒ๋กœ, DAC 3๊ฐœ ์˜์—ญ์˜ ์ „๋ ฅ ์ธก์ •๊ฐ’์—์„œ ๊ณ„์‚ฐํ•˜์˜€๋‹ค. ๋น„๊ต๊ธฐ ํšŒ๋กœ์˜ ์ „๋ ฅ ์†Œ๋น„๋Š” 39% ์ค„์—ˆ๋‹ค. DAC์—์„œ ์†Œ๋น„๋œ ์ „๋ ฅ, ์ฆ‰ CDAC์˜ switching ์ „๋ ฅ ์†Œ๋น„๋Ÿ‰์€ 1.28 nW๊ฐ€ ๊ฐ์†Œํ–ˆ๋Š”๋ฐ, behavioral model์˜ simulation ๊ฒฐ๊ณผ์™€ ๋น„์Šทํ•œ ๊ฐ’์ด๋‹ค. ๋…ผ๋ฆฌ ํšŒ๋กœ ์˜์—ญ์—์„œ๋Š” 12%๊ฐ€ ์ค„์—ˆ๋‹ค. ์ „์ฒด ์ „๋ ฅ ์†Œ๋น„๋Š” ์ ์‘ํ˜• ์Šค์œ„์นญ ๊ธฐ๋ฒ•์„ ์ ์šฉํ–ˆ์„ ๋•Œ 91.02 nW, full switching mode๋กœ ๊ณ ์ •ํ–ˆ์„ ๋•Œ 107.51 nW์œผ๋กœ 15.3% ๊ฐ์†Œํ•˜์˜€๋‹ค. ๋˜, sine ์ž…๋ ฅ์„ ์ด์šฉํ•˜์—ฌ ์„ค๊ณ„ํ•œ ADC์˜ ๊ธฐ๋ณธ ์„ฑ๋Šฅ์„ ์ธก์ •ํ•˜์˜€๋‹ค. ๊ทธ ๊ฒฐ๊ณผ 56.24dB์˜ SNDR๊ณผ 62.00 dB์˜ SFDR์„ ์–ป์—ˆ๊ณ , ๋น„์„ ํ˜•์„ฑ ์ง€ํ‘œ์ธ ์ตœ๋Œ€ DNL๊ณผ INL์€ ๊ฐ๊ฐ +0.39/โˆ’1 LSBs์™€ +0.86/โˆ’1.5 LSBs ์„ ์–ป์—ˆ๋‹ค. ์ด ๋น„์„ ํ˜•์„ฑ ํŠน์„ฑ์€ ์ฃผ๋กœ CDAC ๋‚ด์˜ ์บํŒจ์‹œํ„ฐ ๋ฏธ์Šค๋งค์น˜์— ๊ธฐ์ธํ•œ ๊ฒƒ์ด๋‹ค.Chapter 1 Introduction 1 1.1 Electrocardiography 1 1.2 Recent Trends in SAR ADC Designs 4 1.3 Dissertation Contributions and Organization 7 Chapter 2 SAR ADC Operation and Design Issues 9 2.1 Operation Principle 9 2.2 Switching Algorithms for Power Reduction 12 2.2.1 Computation of Switching Energy Consumption 12 2.2.2 Conventional Charge-Redistribution Switching 15 2.2.3 Split-Capacitor Switching 16 2.2.4 Energy-Saving Switching 18 2.2.5 Set-and-Down Switching 21 2.2.6 Merged-Capacitor Switching 22 2.3 Offset and Noise 25 2.4 Linearity 29 2.5 Area 32 Chapter 3 Adaptive Switching SAR ADC for ECG Monitoring Applications 34 3.1 ECG Characteristics and Readout Circuit 34 3.1.1 ECG Signals and Characteristics 34 3.1.2 ECG Readout Circuit 35 3.2 Related Signal-Specific Works 37 3.2.1 SAR ADC with a Bypass Window for Neural Signals 37 3.2.2 LSB-First Successive Approximation 39 3.3 Adaptive Switching 41 3.3.1 Motivation 41 3.3.2 Preliminary Test 42 3.3.3 Algorithm 46 3.3.4 Energy Consumption of SAR ADC with Segmented CDAC 54 3.3.5 Behavioral Model Simulations 59 3.3.6 Consideration on Other Applications 75 3.4 Circuit Implementation 76 3.4.1 Overview 76 3.4.2 Comparator and CDAC 78 3.4.3 Adaptive Switching Logic 81 Chapter 4 Prototype Measurements 86 4.1 Fabrication and Experiment Setup 86 4.2 Measurements 88 4.2.1 Power Reduction Measurement with ECG-Type Input 88 4.2.2 Intrinsic Performance Measurement with Sinusoidal Input 93 4.2.3 Summary of the Measurements and Specifications 96 Chapter 5 Conclusion 98 Bibliography 101 Abstract in Korean 107Docto

    MR-compatible Electrophysiology Recording System for Multimodal Imaging

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    Simultaneous acquisition of functional magnetic resonance imaging (fMRI) and electrophysiological recordings is an emerging multimodal neuroimaging strategy for studying brain functions. However, the strong magnetic field generated during fMRI greatly degrades the electrophysiological signal quality during simultaneous acquisition. Here, I developed a low powered, miniaturized, system โ€“ โ€œECHOโ€ which delivers a hardware and software solution to overcome the challenges presented by multimodal imaging. The device monitors fluctuations in electromagnetic field during fMRI and synchronizes amplification and sampling of electrophysiological signals to minimize effects of gradient and RF artifacts (electromagnetic artifacts). Furthermore, I introduced a concept of wirelessly transmitting recorded data through the MRI receiver coil. ECHO transmits the data at a frequency visible to the MRI receiver coil, after which the transmitted data is readily separable from the MRI image in the frequency domain. The MR-compatibility of the recorder was evaluated through a series of experiments with a phantom to study its effects on the MRI image quality. To further evaluate the effectiveness of ECHO, I recorded electrocardiogram and local field potential (evoked potential) in live rats during concurrent fMRI acquisition. In summary, ECHO offers a โ€˜plug and playโ€™ solution to capture artifact-free electrophysiological data without the need of expensive amplifiers or synchronization hardware which require physical connection to the MRI scanner. This device is expected to make multimodal imaging more accessible and be applied for a broad range of fMRI studies in both the research and clinical fields

    Data driven optimization in SAR ADC

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    Recent publications show that successive approximation register (SAR) analog to digital converters (ADC) are capable of achieving high efficiency over other ADC topologies. Furthermore, techniques have been adopted to process signals with low activity periods, such as biomedical and industrial sensors. Prior work used least- significant bit first quantization (LSBFQ) to conserve capacitor switching energy and comparator decisions (bitcycles). This work improves on the published least significant bit (LSB) first successive approximation ADC by restructuring its algorithm for further energy efficient switching, lowering its bitcycle range, and extending its range of applications. For target applications, these proposed solutions will outperform the bit-skipping LSยญBFQ and the merged capacitor switching (MCS) SAR, the most energy-efficient traditional most significant bit (MSB) first SAR.Keywords: Adaptive SAR, ADC, LSB-First, LSB First, LSBFQ, SAR, ASB, SSB, Successive Approximation Algorith

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    Department of Electrical EngineeringA Sensor system is advanced along sensor technologies are developed. The performance improvement of sensor system can be expected by using the internet of things (IoT) communication technology and artificial neural network (ANN) for data processing and computation. Sensors or systems exchanged the data through this wireless connectivity, and various systems and applications are possible to implement by utilizing the advanced technologies. And the collected data is computed using by the ANN and the efficiency of system can be also improved. Gas monitoring system is widely need from the daily life to hazardous workplace. Harmful gas can cause a respiratory disease and some gas include cancer-causing component. Even though it may cause dangerous situation due to explosion. There are various kinds of hazardous gas and its characteristics that effect on human body are different each gas. The optimal design of gas monitoring system is necessary due to each gas has different criteria such as the permissible concentration and exposure time. Therefore, in this thesis, conventional sensor system configuration, operation, and limitation are described and gas monitoring system with wireless connectivity and neural network is proposed to improve the overall efficiency. As I already mentioned above, dangerous concentration and permissible exposure time are different depending on gas types. During the gas monitoring, gas concentration is lower than a permissible level in most of case. Thus, the gas monitoring is enough with low resolution for saving the power consumption in this situation. When detecting the gas, the high-resolution is required for the accurate concentration detecting. If the gas type is varied in the above situation, the amount of calculation increases exponentially. Therefore, in the conventional systems, target specifications are decided by the highest requirement in the whole situation, and it occurs increasing the cost and complexity of readout integrated circuit (ROIC) and system. In order to optimize the specification, the ANN and adaptive ROIC are utilized to compute the complex situation and huge data processing. Thus, gas monitoring system with learning-based algorithm is proposed to improve its efficiency. In order to optimize the operation depending on situation, dual-mode ROIC that monitoring mode and precision mode is implemented. If the present gas concentration is decided to safe, monitoring mode is operated with minimal detecting accuracy for saving the power consumption. The precision mode is switched when the high-resolution or hazardous situation are detected. The additional calibration circuits are necessary for the high-resolution implementation, and it has more power consumption and design complexity. A high-resolution Analog-to-digital converter (ADC) is kind of challenges to design with efficiency way. Therefore, in order to reduce the effective resolution of ADC and power consumption, zooming correlated double sampling (CDS) circuit and prediction successive approximation register (SAR) ADC are proposed for performance optimization into precision mode. A Microelectromechanical systems (MEMS) based gas sensor has high-integration and high sensitivity, but the calibration is needed to improve its low selectivity. Conventionally, principle component analysis (PCA) is used to classify the gas types, but this method has lower accuracy in some case and hard to verify in real-time. Alternatively, ANN is powerful algorithm to accurate sensing through collecting the data and training procedure and it can be verified the gas type and concentration in real-time. ROIC was fabricated in complementary metal-oxide-semiconductor (CMOS) 180-nm process and then the efficiency of the system with adaptive ROIC and ANN algorithm was experimentally verified into gas monitoring system prototype. Also, Bluetooth supports wireless connectivity to PC and mobile and pattern recognition and prediction code for SAR ADC is performed in MATLAB. Real-time gas information is monitored by Android-based application in smartphone. The dual-mode operation, optimization of performance and prediction code are adjusted with microcontroller unit (MCU). Monitoring mode is improved by x2.6 of figure-of-merits (FoM) that compared with previous resistive interface.clos

    Continuous-time acquisition of biosignals using a charge-based ADC topology

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    This paper investigates continuous-time (CT) signal acquisition as an activity-dependent and nonuniform sampling alternative to conventional fixed-rate digitisation. We demonstrate the applicability to biosignal representation by quantifying the achievable bandwidth saving by nonuniform quantisation to commonly recorded biological signal fragments allowing a compression ratio of โ‰ˆ5 and 26 when applied to electrocardiogram and extracellular action potential signals, respectively. We describe several desirable properties of CT sampling, including bandwidth reduction, elimination/reduction of quantisation error, and describe its impact on aliasing. This is followed by demonstration of a resource-efficient hardware implementation. We propose a novel circuit topology for a charge-based CT analogue-to-digital converter that has been optimized for the acquisition of neural signals. This has been implemented in a commercially available 0.35 ฮผm CMOS technology occupying a compact footprint of 0.12 mm 2 . Silicon verified measurements demonstrate an 8-bit resolution and a 4 kHz bandwidth with static power consumption of 3.75 ฮผW from a 1.5 V supply. The dynamic power dissipation is completely activity-dependent, requiring 1.39 pJ energy per conversion

    Power efficient, event driven data acquisition and processing using asynchronous techniques

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    PhD ThesisData acquisition systems used in remote environmental monitoring equipment and biological sensor nodes rely on limited energy supply soured from either energy harvesters or battery to perform their functions. Among the building blocks of these systems are power hungry Analogue to Digital Converters and Digital Signal Processors which acquire and process samples at predetermined rates regardless of the monitored signalโ€™s behavior. In this work we investigate power efficient event driven data acquisition and processing techniques by implementing an asynchronous ADC and an event driven power gated Finite Impulse Response (FIR) filter. We present an event driven single slope ADC capable of generating asynchronous digital samples based on the input signalโ€™s rate of change. It utilizes a rate of change detection circuit known as the slope detector to determine at what point the input signal is to be sampled. After a sample has been obtained itโ€™s absolute voltage value is time encoded and passed on to a Time to Digital Converter (TDC) as part of a pulse stream. The resulting digital samples generated by the TDC are produced at a rate that exhibits the same rate of change profile as that of the input signal. The ADC is realized in 0.35mm CMOS process, covers a silicon area of 340mm by 218mm and consumes power based on the input signalโ€™s frequency. The samples from the ADC are asynchronous in nature and exhibit random time periods between adjacent samples. In order to process such asynchronous samples we present a FIR filter that is able to successfully operate on the samples and produce the desired result. The filter also poses the ability to turn itself off in-between samples that have longer sample periods in effect saving power in the process

    Ultra-low Power Circuits for Internet of Things (IOT)

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    Miniaturized sensor nodes offer an unprecedented opportunity for the semiconductor industry which led to a rapid development of the application space: the Internet of Things (IoT). IoT is a global infrastructure that interconnects physical and virtual things which have the potential to dramatically improve people's daily lives. One of key aspect that makes IoT special is that the internet is expanding into places that has been ever reachable as device form factor continue to decreases. Extremely small sensors can be placed on plants, animals, humans, and geologic features, and connected to the Internet. Several challenges, however, exist that could possibly slow the development of IoT. In this thesis, several circuit techniques as well as system level optimizations to meet the challenging power/energy requirement for the IoT design space are described. First, a fully-integrated temperature sensor for battery-operated, ultra-low power microsystems is presented. Sensor operation is based on temperature independent/dependent current sources that are used with oscillators and counters to generate a digital temperature code. Second, an ultra-low power oscillator designed for wake-up timers in compact wireless sensors is presented. The proposed topology separates the continuous comparator from the oscillation path and activates it only for short period when it is required. As a result, both low power tracking and generation of precise wake-up signal is made possible. Third, an 8-bit sub-ranging SAR ADC for biomedical applications is discussed that takes an advantage of signal characteristics. ADC uses a moving window and stores the previous MSBs voltage value on a series capacitor to achieve energy saving compared to a conventional approach while maintaining its accuracy. Finally, an ultra-low power acoustic sensing and object recognition microsystem that uses frequency domain feature extraction and classification is presented. By introducing ultra-low 8-bit SAR-ADC with 50fF input capacitance, power consumption of the frontend amplifier has been reduced to single digit nW-level. Also, serialized discrete Fourier transform (DFT) feature extraction is proposed in a digital back-end, replacing a high-power/area-consuming conventional FFT.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137157/1/seojeong_1.pd

    A Novel Power-Efficient Wireless Multi-channel Recording System for the Telemonitoring of Electroencephalography (EEG)

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    This research introduces the development of a novel EEG recording system that is modular, batteryless, and wireless (untethered) with the supporting theoretical foundation in wireless communications and related design elements and circuitry. Its modular construct overcomes the EEG scaling problem and makes it easier for reconfiguring the hardware design in terms of the number and placement of electrodes and type of standard EEG system contemplated for use. In this development, portability, lightweight, and applicability to other clinical applications that rely on EEG data are sought. Due to printer tolerance, the 3D printed cap consists of 61 electrode placements. This recording capacity can however extend from 21 (as in the international 10-20 systems) up to 61 EEG channels at sample rates ranging from 250 to 1000 Hz and the transfer of the raw EEG signal using a standard allocated frequency as a data carrier. The main objectives of this dissertation are to (1) eliminate the need for heavy mounted batteries, (2) overcome the requirement for bulky power systems, and (3) avoid the use of data cables to untether the EEG system from the subject for a more practical and less restrictive setting. Unpredictability and temporal variations of the EEG input make developing a battery-free and cable-free EEG reading device challenging. Professional high-quality and high-resolution analog front ends are required to capture non-stationary EEG signals at microvolt levels. The primary components of the proposed setup are the wireless power transmission unit, which consists of a power amplifier, highly efficient resonant-inductive link, rectification, regulation, and power management units, as well as the analog front end, which consists of an analog to digital converter, pre-amplification unit, filtering unit, host microprocessor, and the wireless communication unit. These must all be compatible with the rest of the system and must use the least amount of power possible while minimizing the presence of noise and the attenuation of the recorded signal A highly efficient resonant-inductive coupling link is developed to decrease power transmission dissipation. Magnetized materials were utilized to steer electromagnetic flux and decrease route and medium loss while transmitting the required energy with low dissipation. Signal pre-amplification is handled by the front-end active electrodes. Standard bio-amplifier design approaches are combined to accomplish this purpose, and a thorough investigation of the optimum ADC, microcontroller, and transceiver units has been carried out. We can minimize overall system weight and power consumption by employing battery-less and cable-free EEG readout system designs, consequently giving patients more comfort and freedom of movement. Similarly, the solutions are designed to match the performance of medical-grade equipment. The captured electrical impulses using the proposed setup can be stored for various uses, including classification, prediction, 3D source localization, and for monitoring and diagnosing different brain disorders. All the proposed designs and supporting mathematical derivations were validated through empirical and software-simulated experiments. Many of the proposed designs, including the 3D head cap, the wireless power transmission unit, and the pre-amplification unit, are already fabricated, and the schematic circuits and simulation results were based on Spice, Altium, and high-frequency structure simulator (HFSS) software. The fully integrated head cap to be fabricated would require embedding the active electrodes into the 3D headset and applying current technological advances to miniaturize some of the design elements developed in this dissertation

    Wireless body sensor networks for health-monitoring applications

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    This is an author-created, un-copyedited version of an article accepted for publication in Physiological Measurement. The publisher is not responsible for any errors or omissions in this version of the manuscript or any version derived from it. The Version of Record is available online at http://dx.doi.org/10.1088/0967-3334/29/11/R01
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