Photonic integration enabling new multiplexing concepts in optical board-to-board and rack-to-rack interconnects

New broadband applications are causing the datacenters to proliferate, raising the bar for higher interconnection speeds. So far, optical board-to-board and rack-to-rack interconnects relied primarily on low-cost commodity optical components assembled in a single package. Although this concept proved successful in the first generations of optical-interconnect modules, scalability is a daunting issue as signaling rates extend beyond 25 Gb/s. In this paper we present our work towards the development of two technology platforms for migration beyond Infiniband enhanced data rate (EDR), introducing new concepts in board-to-board and rack-to-rack interconnects. The first platform is developed in the framework of MIRAGE European project and relies on proven VCSEL technology, exploiting the inherent cost, yield, reliability and power consumption advantages of VCSELs. Wavelength multiplexing, PAM-4 modulation and multi-core fiber (MCF) multiplexing are introduced by combining VCSELs with integrated Si and glass photonics as well as BiCMOS electronics. An in-plane MCF-to-SOI interface is demonstrated, allowing coupling from the MCF cores to 340x400 nm Si waveguides. Development of a low-power VCSEL driver with integrated feed-forward equalizer is reported, allowing PAM-4 modulation of a bandwidth-limited VCSEL beyond 25 Gbaud. The second platform, developed within the frames of the European project PHOXTROT, considers the use of modulation formats of increased complexity in the context of optical interconnects. Powered by the evolution of DSP technology and towards an integration path between inter and intra datacenter traffic, this platform investigates optical interconnection system concepts capable to support 16QAM 40GBd data traffic, exploiting the advancements of silicon and polymer technologies

Photonic packaging: transforming silicon photonic integrated circuits into photonic devices

Dedicated multi-project wafer (MPW) runs for photonic integrated circuits (PICs) from Si foundries mean that researchers and small-to-medium enterprises (SMEs) can now afford to design and fabricate Si photonic chips. While these bare Si-PICs are adequate for testing new device and circuit designs on a probe-station, they cannot be developed into prototype devices, or tested outside of the laboratory, without first packaging them into a durable module. Photonic packaging of PICs is significantly more challenging, and currently orders of magnitude more expensive, than electronic packaging, because it calls for robust micron-level alignment of optical components, precise real-time temperature control, and often a high degree of vertical and horizontal electrical integration. Photonic packaging is perhaps the most significant bottleneck in the development of commercially relevant integrated photonic devices. This article describes how the key optical, electrical, and thermal requirements of Si-PIC packaging can be met, and what further progress is needed before industrial scale-up can be achieved

Addressing Fiber-to-Chip Coupling Issues in Silicon Photonics

Esta tesis trata de resolver el problema de la interconexión (acoplo) entre un circuito integrado fotónico de silicio (chip) y el mundo exterior, es decir una fibra óptica. Se trata de uno de los temas más importantes a los que hoy en día se enfrenta la comunidad científica en óptica integrada de silicio. A pesar de que pueden realizarse circuitos integrados fotónicos de silicio de muy alta calidad utilizando herramientas estándar de fabricación CMOS, la interfaz con la fibra óptica sigue siendo la fuente más importante de pérdidas, debido a la gran diferencia en el tamaño entre los modos de propagación de la fibra y de las guías de los circuitos integrados fotónicos. Abordar el problema es, por lo tanto, muy importante para poder utilizar los circuitos integrados fotónicos de silicio en una aplicación práctica. Objetivos: El propósito de este trabajo es hacer frente a este problema en la interfaz del acoplamiento fibra-chip, con énfasis en el ensamblado o empaquetado final. Por lo tanto, los objetivos principales son: 1) estudio, modelado y optimización de diseños de diferentes técnicas eficientes de acoplamiento entre fibras ópticas y circuitos integrados fotónicos de silicio, 2) fabricación y demostración experimental de los diseños obtenidos, 3) ensamblado y empaquetado de algunos de los prototipos de acoplamiento fabricados. Metodología: Este trabajo se desarrolla a lo largo de dos líneas de investigación, en conformidad con las dos principales estrategias de acoplamiento que pueden encontrarse en la literatura, concretamente, estructuras de acoplamiento tipo "grating" (la fibra acopla verticalmente sobre la superficie de circuito), y estructuras del tipo ¿inverted taper¿ (la fibra acopla horizontalmente por el extremo de circuito). Resultados: tanto en el caso de estructuras tipo "grating" como en el caso de estructuras "inverted taper", son importantes los avances conseguidos sobre el estado del arte. En lo que respecta al "grating", se ha demostrado dos tipos de estructuras. Por un lado, se ha demostrado "gratings" adecuados para acoplo a guías de silicio convencionales. Por otra parte, se ha demostrado por primera vez el funcionamiento de "gratings" para guías de silicio tipo "slot" horizontal, que son un tipo de guía muy prometedora para aplicaciones de óptica no lineal. En relación con el acoplamiento a través de "inverted taper", se ha demostrado una estructura novedosa basada en este tipo de acoplamiento. Con esta estructura, importantes son los avances conseguidos en el empaquetado de fibras ópticas con el circuito de silicio. Su innovadora integración con estructuras de tipo "V-groove" se presenta como un medio para alinear pasivamente conjuntos de múltiples fibras a un mismo circuito integrado fotónico. También, se estudia el empaquetado de conjuntos de múltiples fibras usando acopladores tipo "grating", resultando en un prototipo de empaquetado de reducido tamaño.Galán Conejos, JV. (2010). Addressing Fiber-to-Chip Coupling Issues in Silicon Photonics [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/9196Palanci

Electronic-photonic board as an integration platform for Tb/s multi-chip optical communication

Chip-on-board silicon photonics O-band wavelength-division multiplexing transceivers have been developed that will eventually enable high-throughput on-board optical communication for multi-socket on-board communication. This direct, any-to-any configuration yields low-latency, low-power optical communication among multiple compute nodes on the board. Silicon photonic transceiver chips are flip-chipped on a polymer waveguide containing an electro-optical circuit board using adiabatic coupling and then completed with driver and amplifier electronic chips. A transceiver assembly based on wire-bond technology verifies 50 Gb/s operation per channel, and the flip-chip version demonstrates the chip on-board assembly techniques for compact on-board transceivers

Hybrid integration of silicon photonics circuits and InP lasers by photonic wire bonding

Efficient coupling of III-V light sources to silicon photonic circuits is one of the key challenges of integrated optics. Important requirements are low coupling losses, as well as small footprint and high yield of the overall assembly, along with the ability to use automated processes for large-scale production. In this paper, we demonstrate that photonic wire bonding addresses these challenges by exploiting direct-write two-photon lithography for in-situ fabrication of three-dimensional freeform waveguides between optical chips. In a series proof-of-concept experiments, we connect InP-based horizontal-cavity surface emitting lasers (HCSEL) to passive silicon photonic circuits with insertion losses down to 0.4 dB. To the best of our knowledge, this is the most efficient interface between an InP light source and a silicon photonic chip that has so far been demonstrated. Our experiments represent a key step in advancing photonic wire bonding to a universal integration platform for hybrid photonic multi-chip assemblies that combine known-good dies of different materials to high-performance hybrid multi-chip modules.Comment: 9 pages, 5 figure

Silicon nitride interferometers for optical sensing with multi-micron dimensions

Increasing the size of the smallest features of Photonic Integrated Circuits (PICs) to multi-micron dimensions can be advantageous to avoid expensive and complex lithographic steps in the fabrication process. In applications where extremely reduced chip size is not a requirement, the design of devices with multi-micron dimensions is potential interesting to avoid the need for e-beam lithography. Another benefit is that making the dimensions larger reduces the effect of lithographic imperfections such as waveguide surface roughness. However, the benefits do not come without limitations. Coupling the light in and out of the circuit is more challenging since diffraction gratings are not available when designing for such large dimensions. Circuit bends must have a larger radius of curvature and the existence of multimode propagation conditions can have detrimental impact in the performance of several devices, such as interferometers. In this study we perform simulations of the coupling between a lensed multimode optical fiber and a multi-micron a-SiN:H rib waveguide. Light coupling efficiency is analyzed as a function of distance variations using the FDTD method and compared with coupling to a strip waveguide. Moreover, we use numerical simulations to study the performance of a Mach-Zehnder interferometer sensitive to refractive index variations. Both the interferometer, splitters and combiners are designed with multi-micron dimensionsinfo:eu-repo/semantics/publishedVersio

Silicon Photonic Modulators for Low-power Applications

In this book, silicon photonic integrated circuits are combined with electro-optic organic materials for realizing energy-efficient modulators with unprecedented performance. These silicon-organic hybrid Mach-Zehnder modulators feature a compact size, sub-Volt drive voltages, and they support data rates up to 84 Gbit/s. In addition, a wet chemical waveguide fabrication scheme and an efficient fiber-chip coupling scheme are presented

Aspectos de interconectividade dos moduladores de polímero

Orientador: Hugo Enrique Hernández-FigueroaTese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de ComputaçãoResumo: As interconexões ópticas e elétricas são de grande interese na area de encapsulamento de circuitos integrados híbridos fotônicos. Baixas perdas e banda larga são necessárias para o desenvolvimento de novas tecnologías na área. Nesta tese apresentan-se as seguintes contribuições originais: uma metodologia do modelamento de interconexões elétricas em encapsulamento de moduladores de polímero eletro-óptico, um dispositivo óptico compacto de banda larga para interconectar a plataforma de silício sobre isolante com a plataforma de filmes finos de polímero sobre silícioAbstract: Electrical and optical interconnects are of great interest for photonic integrated circuits with hybrid platforms. Low loss and wide band are essential for the development of new technologies in this area. In this thesis, we present the following original contributions: a methodology for modeling electrical ceramic interconnects inside an electrooptic polymer packaging, and a compact low-loss optical interconnect for the silicon-on-insulator platform to the thin-film polymer on silicon platformDoutoradoTelecomunicações e TelemáticaDoutor em Engenharia Elétrica07/2014-36CAPE