Multi-Granular Optical Cross-Connect: Design, Analysis, and Demonstration

A fundamental issue in all-optical switching is to offer efficient and cost-effective transport services for a wide range of bandwidth granularities. This paper presents multi-granular optical cross-connect (MG-OXC) architectures that combine slow (ms regime) and fast (ns regime) switch elements, in order to support optical circuit switching (OCS), optical burst switching (OBS), and even optical packet switching (OPS). The MG-OXC architectures are designed to provide a cost-effective approach, while offering the flexibility and reconfigurability to deal with dynamic requirements of different applications. All proposed MG-OXC designs are analyzed and compared in terms of dimensionality, flexibility/reconfigurability, and scalability. Furthermore, node level simulations are conducted to evaluate the performance of MG-OXCs under different traffic regimes. Finally, the feasibility of the proposed architectures is demonstrated on an application-aware, multi-bit-rate (10 and 40 Gbps), end-to-end OBS testbed

A Scalable Packet-Switch Based on Output-Queued NoCs for Data Centre Networks

The switch fabric in a Data-Center Network (DCN) handles constantly variable loads. This is stressing the need for high-performance packet switches able to keep pace with climbing throughput while maintaining resiliency and scalability. Conventional multistage switches with their space-memory variants proved to be performance limited as they do not scale well with the proliferating DC requirements. Most proposals are either too complex to implement or not cost effective. In this paper, we present a highly scalable multistage switching architecture for DC switching fabrics. We describe a three-stage Clos packet-switch fabric with Output-Queued Unidirectional NoC (OQ-UDN) modules and Round-Robin packets dispatching scheme. The proposed OQ Clos-UDN architecture avoids the need for complex and costly input modules and simplifies the scheduling process. Thanks to a dynamic packets dispatching and the multi-hop nature of the UDN modules, the switch provides load balancing and path-diversity. We compared our proposed architecture to state-of-the art previous architectures under extensive uniform and non-uniform DC traffic settings. Simulations of various switch settings have shown that the proposed OQ Clos-UDN outperforms previous proposals and maintains high throughput and latency performance

Congestion-Aware Multistage Packet-Switch Architecture for Data Center Networks

Data Center Networks (DCNs) have gone through major evolutionary changes over the past decades. Yet, it is still difficult to predict loads fluctuation and congestion spikes in the network switching fabric. Conventional multistage switches/routers used in data center fabrics barely deal with load balancing. Congestion management is often processed at the edge modules. However, neither the architecture of switches/routers, nor their inner routing algorithms tend to consider traffic balancing and congestion management. In this paper, we propose a flexible design of a scalable multistage switch with crossconnected UniDirectional Network-on-Chip based central blocs (UDNs). We also introduce a congestion-aware routing to forward packets adaptively. We compare the current switch architecture to the state-of-the art previous multistage switches under different traffic types. Simulations of various switch settings have shown that the proposed architecture maintains high throughput and low latency performance

Providing Performance Guarantees in Data Center Network Switching Fabrics

This paper proposes a novel and highly scalable multistage packet-switch design based on Networks-on-Chip (NoC). In particular, we describe a three-stage packet-switch fabric with a Round-Robin packets dispatching scheme where each central stage module is an Output-Queued Unidirectional NoC (OQ-UDN), instead of the conventional single-hop crossbar. We test the switch performance under different traffic profiles. In addition to experimental results, we present an analytical approximation for the theoretical throughput of the switch under Bernoulli i.i.d arrivals. We also provide an upper-bound estimation of the end-to-end blocking probability in the proposed switch to help predict performance and to optimize the design

Automated routing and control of silicon photonic switch fabrics

Automatic reconfiguration and feedback controlled routing is demonstrated in an 8×8 silicon photonic switch fabric based on Mach-Zehnder interferometers. The use of non-invasive Contactless Integrated Photonic Probes (CLIPPs) enables real-time monitoring of the state of each switching element individually. Local monitoring provides direct information on the routing path, allowing an easy sequential tuning and feedback controlled stabilization of the individual switching elements, thus making the switch fabric robust against thermal crosstalk, even in the absence of a cooling system for the silicon chip. Up to 24 CLIPPs are interrogated by a multichannel integrated ASIC wire-bonded to the photonic chip. Optical routing is demonstrated on simultaneous WDM input signals that are labelled directly on-chip by suitable pilot tones without affecting the quality of the signals. Neither preliminary circuit calibration nor lookup tables are required, being the proposed control scheme inherently insensible to channels power fluctuations

A Scalable Multi-Stage Packet-Switch for Data Center Networks

The growing trends of data centers over last decades including social networking, cloud-based applications and storage technologies enabled many advances to take place in the networking area. Recent changes imply continuous demand for bandwidth to manage the large amount of packetized traffic. Cluster switches and routers make the switching fabric in a Data Center Network (DCN) environment and provide interconnectivity between elements of the same DC and inter DCs. To handle the constantly variable loads, switches need deliver outstanding throughput along with resiliency and scalability for DCN requirements. Conventional DCN switches adopt crossbars or/and blocks of memories mounted in a multistage fashion (commonly 2-Tiers or 3-Tiers). However, current multistage switches, with their space-memory variants, are either too complex to implement, have poor performance, or not cost effective. We propose a novel and highly scalable multistage switch based on Networkson- Chip (NoC) fabrics for DCNs. In particular, we describe a three-stage Clos packet-switch with a Round Robin packets dispatching scheme where each central stage module is based on a Unidirectional NoC (UDN), instead of the conventional singlehop crossbar. The design, referred to as Clos-UDN, overcomes shortcomings of traditional multistage architectures as it (i) Obviates the need for a complex and costly input modules, by means of few, yet simple, input FIFO queues. (ii) Avoids the need for a complex and synchronized scheduling process over a high number of input-output modules and/or port pairs. (iii) Provides speedup, load balancing and path-diversity thanks to a dynamic dispatching scheme as well as the NoC based fabric nature. Simulations show that the Clos-UDN outperforms some common multistage switches under a range of input traffics, making it highly appealing for ultra-high capacity DC networks

Energy-efficient and Scalable Data Centers with Flexible Bandwidth SiPh All-to-All Fabrics

This paper presents a scalable and energy-efficient flexible-bandwidth optical interconnect architecture for data center networks. The proposed approach leverages silicon photonic reconfigurable all-to-all switch fabrics and a cognitive distributed control plane for optical reconfiguration