1,544 research outputs found

    A survey of carbon nanotube interconnects for energy efficient integrated circuits

    Get PDF
    This article is a review of the state-of-art carbon nanotube interconnects for Silicon application with respect to the recent literature. Amongst all the research on carbon nanotube interconnects, those discussed here cover 1) challenges with current copper interconnects, 2) process & growth of carbon nanotube interconnects compatible with back-end-of-line integration, and 3) modeling and simulation for circuit-level benchmarking and performance prediction. The focus is on the evolution of carbon nanotube interconnects from the process, theoretical modeling, and experimental characterization to on-chip interconnect applications. We provide an overview of the current advancements on carbon nanotube interconnects and also regarding the prospects for designing energy efficient integrated circuits. Each selected category is presented in an accessible manner aiming to serve as a survey and informative cornerstone on carbon nanotube interconnects relevant to students and scientists belonging to a range of fields from physics, processing to circuit design

    Printable stretchable interconnects

    Get PDF
    This article presents recent progress and a comprehensive overview of stretchable interconnects based on printable nanocomposites. Nanocomposite-based inks for printed stretchable interconnects have been categorized according to dispersed filler materials. They comprise of carbon-based fillers and metal-based fillers. Benefits in terms of excellent electrical performance and elastic properties make nanocomposites the ideal candidates for stretchable interconnect applications. Deeper analysis of nanocomposites-based stretchable interconnects includes the correlation between the size of fillers, percolation ratio, maximum electrical conductivity and mechanical elasticity. The key trends in the field have been highlighted using curve fitting methods on large data collected from the literature. Furthermore, a wide variety of applications for stretchable interconnects are presented

    Carbon nanotubes as interconnect for next generation network on chip

    Get PDF
    Multi-core processors provide better performance when compared with their single-core equivalent. Recently, Networks-on-Chip (NoC) have emerged as a communication methodology for multi core chips. Network-on-Chip uses packet based communication for establishing a communication path between multiple cores connected via interconnects. Clock frequency, energy consumption and chip size are largely determined by these interconnects. According to the International Technology Roadmap for Semiconductors (ITRS), in the next five years up to 80% of microprocessor power will be consumed by interconnects. In the sub 100nm scaling range, interconnect behavior limits the performance and correctness of VLSI systems. The performance of copper interconnects tend to get reduced in the sub 100nm range and hence we need to examine other interconnect options. Single Wall Carbon Nanotubes exhibit better performance in sub 100nm processing technology due to their very large current carrying capacity and large electron mean free paths. This work suggests using Single Wall Carbon Nanotubes (SWCNT) as interconnects for Networks-on-Chip as they consume less energy and gives more throughput and bandwidth when compared with traditional Copper wires

    Compact and accurate models of large single-wall carbon-nanotube interconnects

    Get PDF
    Single-wall carbon nanotubes (SWCNTs) have been proposed for very large scale integration interconnect applications and their modeling is carried out using the multiconductor transmission line (MTL) formulation. Their time-domain analysis has some simulation issues related to the high number of SWCNTs within each bundle, which results in a highly complex model and loss of accuracy in the case of long interconnects. In recent years, several techniques have been proposed to reduce the complexity of the model whose accuracy decreases as the interconnection length increases. This paper presents a rigorous new technique to generate accurate reduced-order models of large SWCNT interconnects. The frequency response of the MTL is computed by using the spectral form of the dyadic Green's function of the 1-D propagation problem and the model complexity is reduced using rational-model identification techniques. The proposed approach is validated by numerical results involving hundreds of SWCNTs, which confirm its capability of reducing the complexity of the model, while preserving accuracy over a wide frequency range

    Modeling of Thermally Aware Carbon Nanotube and Graphene Based Post CMOS VLSI Interconnect

    Get PDF
    This work studies various emerging reduced dimensional materials for very large-scale integration (VLSI) interconnects. The prime motivation of this work is to find an alternative to the existing Cu-based interconnect for post-CMOS technology nodes with an emphasis on thermal stability. Starting from the material modeling, this work includes material characterization, exploration of electronic properties, vibrational properties and to analyze performance as a VLSI interconnect. Using state of the art density functional theories (DFT) one-dimensional and two-dimensional materials were designed for exploring their electronic structures, transport properties and their circuit behaviors. Primarily carbon nanotube (CNT), graphene and graphene/copper based interconnects were studied in this work. Being reduced dimensional materials the charge carriers in CNT(1-D) and in graphene (2-D) are quantum mechanically confined as a result of this free electron approximation fails to explain their electronic properties. For same reason Drude theory of metals fails to explain electronic transport phenomena. In this work Landauer transport theories using non-equilibrium Green function (NEGF) formalism was used for carrier transport calculation. For phonon transport studies, phenomenological Fourier’s heat diffusion equation was used for longer interconnects. Semi-classical BTE and Landauer transport for phonons were used in cases of ballistic phonon transport regime. After obtaining self-consistent electronic and thermal transport coefficients, an equivalent circuit model is proposed to analyze interconnects’ electrical performances. For material studies, CNTs of different variants were analyzed and compared with existing copper based interconnects and were found to be auspicious contenders with integrational challenges. Although, Cu based interconnect is still outperforming other emerging materials in terms of the energy-delay product (1.72 fJ-ps), considering the electromigration resistance graphene Cu hybrid interconnect proposed in this dissertation performs better. Ten times more electromigration resistance is achievable with the cost of only 30% increase in energy-delay product. This unique property of this proposed interconnect also outperforms other studied alternative materials such as multiwalled CNT, single walled CNT and their bundles

    10 to 50 nm Long Quasi Ballistic Carbon Nanotube Devices Obtained Without Complex Lithography

    Full text link
    A simple method combining photolithography and shadow (or angle) evaporation is developed to fabricate single-walled carbon nanotube (SWCNT) devices with tube lengths L~10-50 nm between metal contacts. Large numbers of such short devices are obtained without the need of complex tools such as electron beam lithography. Metallic SWCNTs with lengths ~ 10 nm, near the mean free path (mfp) of lop~15 nm for optical phonon scattering, exhibit near-ballistic transport at high biases and can carry unprecedented 100 mA currents per tube. Semiconducting SWCNT field-effect transistors (FETs) with ~ 50 nm channel lengths are routinely produced to achieve quasi-ballistic operations for molecular transistors. The results demonstrate highly length-scaled and high-performance interconnects and transistors realized with SWCNTs.Comment: PNAS, in pres

    Tuning Electrical Conductivity of CNT-PDMS Nanocomposites for Flexible Electronic Applications

    Get PDF
    This paper presents a study into the electrical conductivity of multi-wall carbon nanotube-polydimethylsiloxane (MWNT-PDMS) nanocomposite and their dependence on the filler concentration. It is observed that the electrical conductivity of the composites can be tailored by altering the filler concentration. Accordingly, the nanocomposites with filler weight ratio ranging from 1% to 8% were prepared and tested. Finally, the significance of results presented here for flexible pressure sensors and stretchable interconnects for electronic skin applications have been discussed

    Carbon Nanotube Interconnect Modeling for Very Large Scale Integrated Circuits

    Get PDF
    In this research, we have studied and analyzed the physical and electrical properties of carbon nanotubes. Based on the reported models for current transport behavior in non-ballistic CNT-FETs, we have built a dynamic model for non-ballistic CNT-FETs. We have also extended the surface potential model of a non-ballistic CNT-FET to a ballistic CNT-FET and developed a current transport model for ballistic CNT-FETs. We have studied the current transport in metallic carbon nanotubes. By considering the electron-electron interactions, we have modified two-dimensional fluid model for electron transport to build a semi-classical one-dimensional fluid model to describe the electron transport in carbon nanotubes, which is regarded as one-dimensional system. Besides its accuracy compared with two-dimensional fluid model and LĂĽttinger liquid theory, one-dimensional fluid model is simple in mathematical modeling and easier to extend for electronic transport modeling of multi-walled carbon nanotubes and single-walled carbon nanotube bundles as interconnections. Based on our reported one-dimensional fluid model, we have calculated the parameters of the transmission line model for the interconnection wires made of single-walled carbon nanotube, multi-walled carbon nanotube and single-walled carbon nanotube bundle. The parameters calculated from these models show close agreements with experiments and other proposed models. We have also implemented these models to study carbon nanotube for on-chip wire inductors and it application in design of LC voltage-controlled oscillators. By using these CNT-FET models and CNT interconnects models, we have studied the behavior of CNT based integrated circuits, such as the inverter, ring oscillator, energy recovery logic; and faults in CNT based circuits
    • …
    corecore