Performance Model of Multichannel Deflection-Routed All-Optical Networks With Packet Injection Control

Deflection routing is a feasible approach to resolve the output contention problem in packet-switched networks when buffering of packets is not practical. In this paper, we investigate the performance of multichannel deflection-routed networks with no packet injection control, strict packet injection control, and a simple token-bucket-based packet injection control. The analytical performance models of multichannel deflection-routed networks with strict packet injection control are derived. Simulation results show that the analytical models can accurately predict the performance regardless of the network topology, number of channels, and packet injection control methods. We observed that the end-to-end throughput-delay and the packet re-transmission performance at sources can be largely improved by using simple packet injection control mechanisms such as the proposed token-bucket-based method.postprin

Photonic Integrated Semiconductor Optical Amplifier Switch Circuits

No abstract

High capacity photonic integrated switching circuits

As the demand for high-capacity data transfer keeps increasing in high performance computing and in a broader range of system area networking environments; reconfiguring the strained networks at ever faster speeds with larger volumes of traffic has become a huge challenge. Formidable bottlenecks appear at the physical layer of these switched interconnects due to its energy consumption and footprint. The energy consumption of the highly sophisticated but increasingly unwieldy electronic switching systems is growing rapidly with line rate, and their designs are already being constrained by heat and power management issues. The routing of multi-Terabit/second data using optical techniques has been targeted by leading international industrial and academic research labs. So far the work has relied largely on discrete components which are bulky and incurconsiderable networking complexity. The integration of the most promising architectures is required in a way which fully leverages the advantages of photonic technologies. Photonic integration technologies offer the promise of low power consumption and reduced footprint. In particular, photonic integrated semiconductor optical amplifier (SOA) gate-based circuits have received much attention as a potential solution. SOA gates exhibit multi-terahertz bandwidths and can be switched from a high-gain state to a high-loss state within a nanosecond using low-voltage electronics. In addition, in contrast to the electronic switching systems, their energy consumption does not rise with line rate. This dissertation will discuss, through the use of different kind of materials and integration technologies, that photonic integrated SOA-based optoelectronic switches can be scalable in either connectivity or data capacity and are poised to become a key technology for very high-speed applications. In Chapter 2, the optical switching background with the drawbacks of optical switches using electronic cores is discussed. The current optical technologies for switching are reviewed with special attention given to the SOA-based switches. Chapter 3 discusses the first demonstrations using quantum dot (QD) material to develop scalable and compact switching matrices operating in the 1.55µm telecommunication window. In Chapter 4, the capacity limitations of scalable quantum well (QW) SOA-based multistage switches is assessed through experimental studies for the first time. In Chapter 5 theoretical analysis on the dependence of data integrity as ultrahigh line-rate and number of monolithically integrated SOA-stages increases is discussed. Chapter 6 presents some designs for the next generation of large scale photonic integrated interconnects. A 16x16 switch architecture is described from its blocking properties to the new miniaturized elements proposed. Finally, Chapter 7 presents several recommendations for future work, along with some concluding remark

Control plane routing in photonic networks

The work described in the thesis investigates the features of control plane functionality for routing wavelength paths to serve a set of sub-wavelength demands. The work takes account of routing problems only found in physical network layers, notably analogue transmission impairments. Much work exists on routing connections for dynamic Wavelength-Routed Optical Networks (WRON) and to demonstrate their advantages over static photonic networks. However, the question of how agile the WRON should be has not been addressed quantitatively. A categorization of switching speeds is extended, and compared with the reasons for requiring network agility. The increase of effective network capacity achieved with increased agility is quantified through new simulations. It is demonstrated that this benefit only occurs within a certain window of network fill; achievement of significant gain from a more-agile network may be prevented by the operator’s chosen tolerable blocking probability. The Wavelength Path Sharing (WPS) scheme uses semi-static wavelengths to form unidirectional photonic shared buses, reducing the need for photonic agility. Making WPS more practical, novel improved routing algorithms are proposed and evaluated for both execution time and performance, offering significant benefit in speed at modest cost in efficiency. Photonic viability is the question of whether a path that the control plane can configure will work with an acceptable bit error rate (BER) despite the physical transmission impairments encountered. It is shown that, although there is no single approach that is simple, quick to execute and generally applicable at this time, under stated conditions approximations may be made to achieve a general solution that will be fast enough to enable some applications of agility. The presented algorithms, analysis of optimal network agility and viability assessment approaches can be applied in the analysis and design of future photonic control planes and network architectures

Network-on-Chip

Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip: The Next Generation of System-on-Chip Integration examines the current issues restricting chip-on-chip communication efficiency, and explores Network-on-chip (NoC), a promising alternative that equips designers with the capability to produce a scalable, reusable, and high-performance communication backbone by allowing for the integration of a large number of cores on a single system-on-chip (SoC). This book provides a basic overview of topics associated with NoC-based design: communication infrastructure design, communication methodology, evaluation framework, and mapping of applications onto NoC. It details the design and evaluation of different proposed NoC structures, low-power techniques, signal integrity and reliability issues, application mapping, testing, and future trends. Utilizing examples of chips that have been implemented in industry and academia, this text presents the full architectural design of components verified through implementation in industrial CAD tools. It describes NoC research and developments, incorporates theoretical proofs strengthening the analysis procedures, and includes algorithms used in NoC design and synthesis. In addition, it considers other upcoming NoC issues, such as low-power NoC design, signal integrity issues, NoC testing, reconfiguration, synthesis, and 3-D NoC design. This text comprises 12 chapters and covers: The evolution of NoC from SoC—its research and developmental challenges NoC protocols, elaborating flow control, available network topologies, routing mechanisms, fault tolerance, quality-of-service support, and the design of network interfaces The router design strategies followed in NoCs The evaluation mechanism of NoC architectures The application mapping strategies followed in NoCs Low-power design techniques specifically followed in NoCs The signal integrity and reliability issues of NoC The details of NoC testing strategies reported so far The problem of synthesizing application-specific NoCs Reconfigurable NoC design issues Direction of future research and development in the field of NoC Network-on-Chip: The Next Generation of System-on-Chip Integration covers the basic topics, technology, and future trends relevant to NoC-based design, and can be used by engineers, students, and researchers and other industry professionals interested in computer architecture, embedded systems, and parallel/distributed systems

Advances in Optical Amplifiers

Optical amplifiers play a central role in all categories of fibre communications systems and networks. By compensating for the losses exerted by the transmission medium and the components through which the signals pass, they reduce the need for expensive and slow optical-electrical-optical conversion. The photonic gain media, which are normally based on glass- or semiconductor-based waveguides, can amplify many high speed wavelength division multiplexed channels simultaneously. Recent research has also concentrated on wavelength conversion, switching, demultiplexing in the time domain and other enhanced functions. Advances in Optical Amplifiers presents up to date results on amplifier performance, along with explanations of their relevance, from leading researchers in the field. Its chapters cover amplifiers based on rare earth doped fibres and waveguides, stimulated Raman scattering, nonlinear parametric processes and semiconductor media. Wavelength conversion and other enhanced signal processing functions are also considered in depth. This book is targeted at research, development and design engineers from teams in manufacturing industry, academia and telecommunications service operators