Routing and processor allocation on a hypercycle-based multiprocessor

In this work we present a brief overview of Hypercycles[4,5,8] can be considered as the Hypercycies which is a class of products of "basic " graphs that use a rich set of multidimensional graphs. These graphs can be component "basic " graphs ranging in complexity used to structure Concurrent Multiprocessor from simple rings to the fully connected ones. Systems so as to best match the requirements of Because the "basic " graphs are defined, we are a given application. able to provide analytical expressions for We present the backtrack-to-the-origin-and- routing. Our goals are retry routing as applied to Hypercycles, as well (a) To provide computer interconnection as its performance evaluation based on networks that match the node simulations. requirements of a given embedded system. Also, we present the a First Fit processor (b) To increase throughput of a given network allocation strategy for Hypercycle-based by providing routing expressions that can Multiprocessors, and prove that such a strategy be computed analytically (and hence are is statically optimal. candidates for VLSI implementation) and Finally, we discuss the implementation which provide a number of alternate paths status of a router component for the backtrack- from a source to a destination. to-the-origin-and-retry routing. The Hypercycles, being regular graphs. retain the advantages of easy routing and 1. Introduction regularity. Yet, since we are dealing with a class, Message passing concurrent computers such rather than isolated graphs, we have th