A Soft-Aided Staircase Decoder Using Three-Level Channel Reliabilities

The soft-aided bit-marking (SABM) algorithm is based on the idea of marking bits as highly reliable bits (HRBs), highly unreliable bits (HUBs), and uncertain bits to improve the performance of hard-decision (HD) decoders. The HRBs and HUBs are used to assist the HD decoders to prevent miscorrections and to decode those originally uncorrectable cases via bit flipping (BF), respectively. In this paper, an improved SABM algorithm (called iSABM) is proposed for staircase codes (SCCs). Similar to the SABM, iSABM marks bits with the help of channel reliabilities, i.e., using the absolute values of the log-likelihood ratios. The improvements offered by iSABM include: (i) HUBs being classified using a reliability threshold, (ii) BF randomly selecting HUBs, and (iii) soft-aided decoding over multiple SCC blocks. The decoding complexity of iSABM is comparable of that of SABM. This is due to the fact that on the one hand no sorting is required (lower complexity) because of the use of a threshold for HUBs, while on the other hand multiple SCC blocks use soft information (higher complexity). Additional gains of up to 0.53 dB with respect to SABM and 0.91 dB with respect to standard SCC decoding at a bit error rate of $10^{-6}$ are reported. Furthermore, it is shown that using 1-bit reliability marking, i.e., only having HRBs and HUBs, only causes a gain penalty of up to 0.25 dB with a significantly reduced memory requirement

Self-concatenated code design and its application in power-efficient cooperative communications

In this tutorial, we have focused on the design of binary self-concatenated coding schemes with the help of EXtrinsic Information Transfer (EXIT) charts and Union bound analysis. The design methodology of future iteratively decoded self-concatenated aided cooperative communication schemes is presented. In doing so, we will identify the most important milestones in the area of channel coding, concatenated coding schemes and cooperative communication systems till date and suggest future research directions

Multi-Domain Polarization for Enhancing the Physical Layer Security of MIMO Systems

A novel Physical Layer Security (PLS) framework is conceived for enhancing the security of the wireless communication systems by exploiting multi-domain polarization in Multiple-Input Multiple-Output (MIMO) systems. We design a sophisticated key generation scheme based on multi-domain polarization, and the corresponding receivers. An in-depth analysis of the system's secrecy rate is provided, demonstrating the confidentiality of our approach in the presence of eavesdroppers having strong computational capabilities. More explicitly, our simulation results and theoretical analysis corroborate the advantages of the proposed scheme in terms of its bit error rate (BER), block error rate (BLER), and maximum achievable secrecy rate. Our findings indicate that the innovative PLS framework effectively enhances the security and reliability of wireless communication systems. For instance, in a $4\times4$ MIMO setup, the proposed PLS strategy exhibits an improvement of $2$dB compared to conventional MIMO, systems at a BLER of $2\cdot 10^{-5}$ while the eavesdropper's BLER reaches $1$

Ordered Reliability Direct Error Pattern Testing Decoding Algorithm

We introduce a novel universal soft-decision decoding algorithm for binary block codes called ordered reliability direct error pattern testing (ORDEPT). Our results, obtained for a variety of popular short high-rate codes, demonstrate that ORDEPT outperforms state-of-the-art decoding algorithms of comparable complexity such as ordered reliability bits guessing random additive noise decoding (ORBGRAND) in terms of the decoding error probability and latency. The improvements carry on to the iterative decoding of product codes and convolutional product-like codes, where we present a new adaptive decoding algorithm and demonstrate the ability of ORDEPT to efficiently find multiple candidate codewords to produce soft output

High Speed S-band Communications System for Nanosatellites

3Cat-3 is a nanosatellite based on the 6 unit cubesat standard. Its payload is an optical multispectral imager that imposes stringent downlink requirements for a nanosatellite. This TFG is based on the experience gained in 3Cat-1 and 3Cat-2 communications systems to develop a "high speed" (goal >= 5 Mbps) downlink for nanosatellites based on the TI CC3200.In order to accomplish the objectives of the next generation of nanosatellites high-speed downlinks have to be designed. This goal faces stringent design constraints as nanosatellites are limit in power, processing capabilities and dimensions. In the quest for higher bit rates the widely used VHF band has to be replaced for higher frequency bands and the link budged margin tightened, decreasing the SNR at reception. The proposed solution uses COTS 2.4 GHz WiFi adapters as transceivers. Range limitations imposed by the default 802.11 mode of operation are bypassed by using packet forging and injection at transmission jointly with monitor mode at reception. A loss-resilient unidirectional downlink is achieved by using application-layer encoding by means of LPDC-Staircase codes. This solution has been already implemented in 3CAT-2, a 6 unit cubesat GNSS-R mission to be launched in July 2016. In addition, bursts of errors are combated by using Reed-Solomon. The system has been tested under Doppler shift and scintillation effects, and a 188Km link between Barcelona and Mallorca has been performed, showing satisfactory results

On hard-decision forward error correction with application to high-throughput fiber-optic communications

The advent of the Internet not only changed the communication methods significantly, but also the life-style of the human beings. The number of Internet users has grown exponentially in the last decade, and the number of users exceeded 3.4 billion in 2016. Fiber links serve as the Internet backbone, hence, the fast grow of the Internet network and the sheer of new applications is highly driven by advances in optical communications. The emergence of coherent optical systems has led to a more efficient use of the available spectrum compared to traditional on-off keying transmission, and has made it possible to increase the supported data rates. To achieve high spectral efficiencies and improve the transmission reach, coding in combination with a higher order modulation, a scheme known as coded modulation (CM), has become indispensable in fiber-optic communications. In the recent years, graph-based codes such as low-density parity-check codes and soft decision decoding (SDD) have been adopted for long-haul coherent optical systems. SDD yields very high net coding gains but at the expense of a relatively high decoding complexity, which brings implementation challenges at very high data rates. Hard decision decoding (HDD) is an appealing alternative that reduces the decoding complexity. This motivates the focus of this thesis on forward error correction (FEC) with HDD for high-throughput, low power fiber-optic communications.In this thesis, we start by studying the performance bounds of HDD. In particular, we derive achievable information rates (AIRs) for CM with HDD for both bit-wise and symbol-wise decoding, and show that bit-wise HDD yields significantly higher AIRs. We also design nonbinary staircase codes using density evolution. Finite length simulation results of binary and nonbinary staircase codes corroborate the conclusions arising from the AIR analysis, i.e., for HDD binary codes are preferable. Then, we consider probabilistic shaping. In particular, we extend the probabilistic amplitude shaping (PAS) scheme recently introduced by B\uf6cherer et al. to HDD based on staircase codes. Finally, we focus on new decoding algorithms for product-like codes to close the gap between HDD and SDD, while keeping the decoding complexity low. In particular, we propose three novel decoding algorithms for product-like codes based on assisting the HDD with some level of soft information. The proposed algorithms provide a clear performance-complexity tradeoff. In particular, we show that up to roughly half of the gap between SDD and HDD can be closed with limited complexity increase with respect to HDD

Variable-Rate VLSI Architecture for 400-Gb/s Hard-Decision Product Decoder

Variable-rate transceivers, which adapt to the conditions, will be central to energy-efficient communication. However, fiber-optic communication systems with high bit-rate requirements make design of flexible transceivers challenging, since additional circuits needed to orchestrate the flexibility will increase area and degrade speed. We propose a variable-rate VLSI architecture of a forward error correction (FEC) decoder based on hard-decision product codes. Variable shortening of component codes provides a mechanism by which code rate can be varied, the number of iterations offers a knob to control the coding gain, while a key-equation solver module that can swap between error-locator polynomial coefficients provides a means to change error correction capability. Our evaluations based on 28-nm netlists show that a variable-rate decoder implementation can offer a net coding gain (NCG) range of 9.96-10.38 dB at a post-FEC bit-error rate of 10^-15. The decoder achieves throughputs in excess of 400 Gb/s, latencies below 53 ns, and energy efficiencies of 1.14 pJ/bit or less. While the area of the variable-rate decoder is 31% larger than a decoder with a fixed rate, the power dissipation is a mere 5% higher. The variable error correction capability feature increases the NCG range further, to above 10.5 dB, but at a significant area cost