4 research outputs found

    New approximate qr-ls algorithms for minimum output energy (MOE) receivers in ds-cdma communication systems

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    This paper proposes a new family of approximate QR-based least-squares (LS) adaptive algorithms called p-AQR- LS for blind minimum output energy (MOE) detection in CDMA communications systems. It extends the A-QR-LS algorithm by retaining different numbers of diagonal plus p -1 off-diagonals of the triangular factor of the augmented data matrix. For p =1 and N ( N is the length of the weighting vector), it reduces to the A-QR-LS and the QR-RLS algorithms, respectively. It not only provides a link between the QR-LMS-type and the QR-RLS algorithms through a well-structured family of algorithms, but also offers more freedom in the complexity-performance tradeoffs for practical receiver design in communication systems. The performance of the proposed algorithm is verified by computer simulations. © 2005 IEEE.published_or_final_versio

    CP-Based SBHT-RLS Algorithms for Tracking Channel Estimates in Multicarrier Modulation Systems

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    REAL-TIME ADAPTIVE PULSE COMPRESSION ON RECONFIGURABLE, SYSTEM-ON-CHIP (SOC) PLATFORMS

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    New radar applications need to perform complex algorithms and process a large quantity of data to generate useful information for the users. This situation has motivated the search for better processing solutions that include low-power high-performance processors, efficient algorithms, and high-speed interfaces. In this work, hardware implementation of adaptive pulse compression algorithms for real-time transceiver optimization is presented, and is based on a System-on-Chip architecture for reconfigurable hardware devices. This study also evaluates the performance of dedicated coprocessors as hardware accelerator units to speed up and improve the computation of computing-intensive tasks such matrix multiplication and matrix inversion, which are essential units to solve the covariance matrix. The tradeoffs between latency and hardware utilization are also presented. Moreover, the system architecture takes advantage of the embedded processor, which is interconnected with the logic resources through high-performance buses, to perform floating-point operations, control the processing blocks, and communicate with an external PC through a customized software interface. The overall system functionality is demonstrated and tested for real-time operations using a Ku-band testbed together with a low-cost channel emulator for different types of waveforms

    Performance Analysis of Blind Adaptive MOE Multiuser Receivers Using Inverse QRD-RLS Algorithm

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