1,762 research outputs found

    Analysis of a batch-service queue with variable service capacity, correlated customer types and generally distributed class-dependent service times

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    Queueing models with batch service have been studied frequently, for instance in the domain of telecommunications or manufacturing. Although the batch server's capacity may be variable in practice, only a few authors have included variable capacity in their models. We analyse a batch server with multiple customer classes and a variable service capacity that depends on both the number of waiting customers and their classes. The service times are generally distributed and class-dependent. These features complicate the analysis in a non-trivial way. We tackle it by examining the system state at embedded points, and studying the resulting Markov Chain. We first establish the joint probability generating function (pgf) of the service capacity and the number of customers left behind in the queue immediately after service initiation epochs. From this joint pgf, we extract the pgf for the number of customers in the queue and in the system respectively at service initiation epochs and departure epochs, and the pgf of the actual server capacity. Combined with additional techniques, we also obtain the pgf of the queue and system content at customer arrival epochs and random slot boundaries, and the pgf of the delay of a random customer. In the numerical experiments, we focus on the impact of correlation between the classes of consecutive customers, and on the influence of different service time distributions on the system performance. (C) 2019 Elsevier B.V. All rights reserved

    Performance analysis of networks on chips

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    Modules on a chip (such as processors and memories) are traditionally connected through a single link, called a bus. As chips become more complex and the number of modules on a chip increases, this connection method becomes inefficient because the bus can only be used by one module at a time. Networks on chips are an emerging technology for the connection of on-chip modules. In networks on chips, switches are used to transmit data from one module to another, which entails that multiple links can be used simultaneously so that communication is more efficient. Switches consist of a number of input ports to which data arrives and output ports from which data leaves. If data at multiple input ports has to be transmitted to the same output port, only one input port may actually transmit its data, which may lead to congestion. Queueing theory deals with the analysis of congestion phenomena caused by competition for service facilities with scarce resources. Such phenomena occur, for example, in traffic intersections, manufacturing systems, and communication networks like networks on chips. These congestion phenomena are typically analysed using stochastic models, which capture the uncertain and unpredictable nature of processes leading to congestion (such as irregular car arrivals to a traffic intersection). Stochastic models are useful tools for the analysis of networks on chips as well, due to the complexity of data traffic on these networks. In this thesis, we therefore study queueing models aimed at networks on chips. The thesis is centred around two key models: A model of a switch in isolation, the so-called single-switch model, and a model of a network of switches where all traffic has the same destination, the so-called network of polling stations. For both models we are interested in the throughput (the amount of data transmitted per time unit) and the mean delay (the time it takes data to travel across the network). Single-switch models are often studied under the assumption that the number of ports tends to infinity and that traffic is uniform (i.e., on average equally many packets arrive to all buffers, and all possible destinations are equally likely). In networks on chips, however, the number of buffers is typically small. We introduce a new approximation specifically aimed at small switches with (memoryless) Bernoulli arrivals. We show that, for such switches, this approximation is more accurate than currently known approximations. As traffic in networks on chips is usually non-uniform, we also extend our approximation to non-uniform switches. The key difference between uniform and nonuniform switches is that in non-uniform switches, all queues have a different maximum throughput. We obtain a very accurate approximation of this throughput, which allows us to extend the mean delay approximation. The extended approximation is derived for Bernoulli arrivals and correlated arrival processes. Its accuracy is verified through a comparison with simulation results. The second key model is that of concentrating tree networks of polling stations (polling stations are essentially switches where all traffic has the same output port as destination). Single polling stations have been studied extensively in literature, but only few attempts have been made to analyse networks of polling stations. We establish a reduction theorem that states that networks of polling stations can be reduced to single polling stations while preserving some information on mean waiting times. This reduction theorem holds under the assumption that the last node of the network uses a so-called HoL-based service discipline, which means that the choice to transmit data from a certain buffer may only depend on which buffers are empty, but not on the amount of data in the buffers. The reduction theorem is a key tool for the analysis of networks of polling stations. In addition to this, mean waiting times in single polling stations have to be calculated, either exactly or approximately. To this end, known results can be used, but we also devise a new single-station approximation that can be used for a large subclass of HoL-based service disciplines. Finally, networks on chips typically implement flow control, which is a mechanism that limits the amount of data in the network from one source. We analyse the division of throughput over several sources in a network of polling stations with flow control. Our results indicate that the throughput in such a network is determined by an interaction between buffer sizes, flow control limits, and service disciplines. This interaction is studied in more detail by means of a numerical analysis

    Upstream traffic capacity of a WDM EPON under online GATE-driven scheduling

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    Passive optical networks are increasingly used for access to the Internet and it is important to understand the performance of future long-reach, multi-channel variants. In this paper we discuss requirements on the dynamic bandwidth allocation (DBA) algorithm used to manage the upstream resource in a WDM EPON and propose a simple novel DBA algorithm that is considerably more efficient than classical approaches. We demonstrate that the algorithm emulates a multi-server polling system and derive capacity formulas that are valid for general traffic processes. We evaluate delay performance by simulation demonstrating the superiority of the proposed scheduler. The proposed scheduler offers considerable flexibility and is particularly efficient in long-reach access networks where propagation times are high

    Polling models with multi-phase gated service

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    In this paper we introduce and analyze a new class of service policies called multi-phase gated service. This policy is a generalization of the classical single-phase and two-phase gated policies and works as follows. Each customer that arrives at queue i will have to wait K_i cycles before it receives service. The aim of this policy is to provide an interleaving scheme to avoid monopolization of the system by heavily loaded queues, by choosing the proper values of interleaving levels Ki. In this paper, we analyze the effectiveness of the interleaving scheme on the queueing behavior of the system, and consider the problem of identifying the proper combination of interleaving levels (K_1,...,K_N) that minimizes a weighted sum of the mean waiting times at each of the N queues. Obviously, the proper choice of the interleaving levels is most critical when the system is heavily loaded. For this reason, we to obtain closed-form expressions for the asymptotic waiting-time distributions in heavy trafficc, and use these expressions to derive simple heuristics for approximating the optimal interleaving scheme. Numerical results with simulations demonstrate that the accuracy of these approximations is extremely high

    Delay analysis of a two-class batch-service queue with class-dependent variable server capacity

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    In this paper, we analyse the delay of a random customer in a two-class batch-service queueing model with variable server capacity, where all customers are accommodated in a common single-server first-come-first-served queue. The server can only process customers that belong to the same class, so that the size of a batch is determined by the length of a sequence of same-class customers. This type of batch server can be found in telecommunications systems and production environments. We first determine the steady state partial probability generating function of the queue occupancy at customer arrival epochs. Using a spectral decomposition technique, we obtain the steady state probability generating function of the delay of a random customer. We also show that the distribution of the delay of a random customer corresponds to a phase-type distribution. Finally, some numerical examples are given that provide further insight in the impact of asymmetry and variance in the arrival process on the number of customers in the system and the delay of a random customer

    Characterization of the Burst Stabilization Protocol for the RR/RR CICQ Switch

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    Input buffered switches with Virtual Output Queueing (VOQ) can be unstable when presented with unbalanced loads. Existing scheduling algorithms, including iSLIP for Input Queued (IQ) switches and Round Robin (RR) for Combined Input and Crossbar Queued (CICQ) switches, exhibit instability for some schedulable loads. We investigate the use of a queue length threshold and bursting mechanism to achieve stability without requiring internal speed-up. An analytical model is developed to prove that the burst stabilization protocol achieves stability and to predict the minimum burst value needed as a function of offered load. The analytical model is shown to have very good agreement with simulation results. These results show the advantage of the RR/RR CICQ switch as a contender for the next generation of high-speed switches.Comment: Presented at the 28th Annual IEEE Conference on Local Computer Networks (LCN), Bonn/Konigswinter, Germany, Oct 20-24, 200
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