21 research outputs found

    Fuzzy ethics: or how I learned to stop worrying and love the bot.

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    The recent death of a Volkswagen worker at the hand of a factory robot has resulted in a number of editorials and opinion pieces discussing moral responsibility and robots. In this short response piece we outline some of the wider context of this discussion, with reference to the classic ethical study the Case of the Killer Robot. We argue that there is a growing need for the field of computer ethics to consider with some urgency what it means to be a responsible moral agent when tragic events occur, and to what extent it makes sense to 'blame the robot'

    Efficient Implementation of Radix-4 Division by Recurrence

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    This paper presents the design of a radix-4, 32-bit integer divider which uses a recursive, non-restoring division algorithm. The primary focus for this design is on high-speed operation while maintaining low power consumption. This implementation accepts 32-bit unsigned integers as input, and returns the quotient, remainder, and a special case divide-by-zero flag. Included in this paper is the motivation for this design, background information necessary to understand the algorithm in use, details of the algorithm's implementation, and the evaluation of the proposed design implemented in IBM/GF 32nm SOI technology, which is then compared against other division implementations.Electrical Engineerin

    Yippelia: Triggering Deep Property Violations in Hardware Designs through Symbolic Execution

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    We in Yippelia attempt to automatically identify deep bugs in hardware designs by symbolically exploring hardware designs for one clock cycle and then stitching the generated simple paths to form a multi-cycle path from the reset state to the buggy state. Compared to a state-of-the-art symbolic execution engine, Yippelia has an average speedup of at least four orders of magnitude on finding deep bugs on the up-down counter hardware design.Bachelor of Scienc

    On Supervisor Synthesis via Active Automata Learning

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    Our society\u27s reliance on computer-controlled systems is rapidly growing. Such systems are found in various devices, ranging from simple light switches to safety-critical systems like autonomous vehicles. In the context of safety-critical systems, safety and correctness are of utmost importance. Faults and errors could have catastrophic consequences. Thus, there is a need for rigorous methodologies that help provide guarantees of safety and correctness. Supervisor synthesis, the concept of being able to mathematically synthesize a supervisor that ensures that the closed-loop system behaves in accordance with known requirements, can indeed help.This thesis introduces supervisor learning, an approach to help automate the learning of supervisors in the absence of plant models. Traditionally, supervisor synthesis makes use of plant models and specification models to obtain a supervisor. Industrial adoption of this method is limited due to, among other things, the difficulty in obtaining usable plant models. Manually creating these plant models is an error-prone and time-consuming process. Thus, supervisor learning intends to improve the industrial adoption of supervisory control by automating the process of generating supervisors in the absence of plant models.The idea here is to learn a supervisor for the system under learning (SUL) by active interaction and experimentation. To this end, we present two algorithms, SupL*, and MSL, that directly learn supervisors when provided with a simulator of the SUL and its corresponding specifications. SupL* is a language-based learner that learns one supervisor for the entire system. MSL, on the other hand, learns a modular supervisor, that is, several smaller supervisors, one for each specification. Additionally, a third algorithm, MPL, is introduced for learning a modular plant model.The approach is realized in the tool MIDES and has been used to learn supervisors in a virtual manufacturing setting for the Machine Buffer Machine example, as well as learning a model of the Lateral State Manager, a sub-component of a self-driving car. These case studies show the feasibility and applicability of the proposed approach, in addition to helping identify future directions for research

    Design, Implementation and Evaluation of a Redundancy Management System for Fault-Tolerant Wireless Devices in Harsh Environments

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    Wireless sensor networks (WSNs), when deployed in harsh environments, can fail prematurely due to elevated rates of component failures. To counteract this problem, fault-tolerant techniques, such as redundancy, may be used. A redundant design requires a management system. Built-in tests (BITs) are one of the most commonly used approaches for managing redundancy, but it suffers from issues such as imperfect fault coverage and common-cause failures (CCFs). In this work, a BIT based redundancy management system has been designed that makes use of a supervisory unit and a modular architecture to address issues with imperfect fault coverage and CCFs. The design has been implemented in prototype WSN devices and evaluated through reliability analysis, fault injection testing and industrial test deployments. The evaluation results have demonstrated the fault-tolerant capabilities of the proposed system design

    Cyber Threats and NATO 2030: Horizon Scanning and Analysis

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    The book includes 13 chapters that look ahead to how NATO can best address the cyber threats, as well as opportunities and challenges from emerging and disruptive technologies in the cyber domain over the next decade. The present volume addresses these conceptual and practical requirements and contributes constructively to the NATO 2030 discussions. The book is arranged in five short parts...All the chapters in this book have undergone double-blind peer review by at least two external experts.https://scholarworks.wm.edu/asbook/1038/thumbnail.jp

    Scientiļ¬c uncertainty and decision making

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    It is important to have an adequate model of uncertainty, since decisions must be made before the uncertainty can be resolved. For instance, ļ¬‚ood defenses must be designed before we know the future distribution of ļ¬‚ood events. It is standardly assumed that probability theory oļ¬€ers the best model of uncertain information. I think there are reasons to be sceptical of this claim. I criticise some arguments for the claim that probability theory is the only adequate model of uncertainty. In particular I critique Dutch book arguments, representation theorems, and accuracy based arguments. Then I put forward my preferred model: imprecise probabilities. These are sets of probability measures. I oļ¬€er several motivations for this model of uncertain belief, and suggest a number of interpretations of the framework. I also defend the model against some criticisms, including the so-called problem of dilation. I apply this framework to decision problems in the abstract. I discuss some decision rules from the literature including Leviā€™s E-admissibility and the more permissive rule favoured by Walley, among others. I then point towards some applications to climate decisions. My conclusions are largely negative: decision making under such severe uncertainty is inevitably diļ¬ƒcult. I ļ¬nish with a case study of scientiļ¬c uncertainty. Climate modellers attempt to oļ¬€er probabilistic forecasts of future climate change. There is reason to be sceptical that the model probabilities oļ¬€ered really do reļ¬‚ect the chances of future climate change, at least at regional scales and long lead times. Indeed, scientiļ¬c uncertainty is multi-dimensional, and diļ¬ƒcult to quantify. I argue that probability theory is not an adequate representation of the kinds of severe uncertainty that arise in some areas in science. I claim that this requires that we look for a better framework for modelling uncertaint

    The design and implementation of a local area network configurational audit tool

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    Configurational audit deals with identifying oversights or omissions in the use of otherwise secure computer security controls. Over the past decade, these errors, and the system vulnerability they create, have featured in many successful computer system attacks. Often, such vulnerability is easily introduced to systems, but difficult to manually detect. This thesis deals with configurational audit tools, which are used detect such vulnerability; an overview of technical vulnerability, as well as the field of configurational audit, are provided. A configurational audit and conformance tool called NetAudit is described. This tool, designed for the Novell NetWare 3.1x LAN operating system, uses conformance testing as its primary means of detecting vulnerability. The design and implementation of NetAudit are described, and the effectiveness of conformance testing as a means of performing configurational audit is assessed

    Towards Automated Security Validation for Hardware Designs

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    Hardware provides the foundation of trust for computer systems. Defects in hardware designs routinely cause vulnerabilities that are exploitable by malicious software and compromise the security of the entire system. While mature hardware validation tools exist, they were primarily designed for checking functional correctness. How to systematically detect security-critical defects remains an open and challenging question.In this dissertation, I develop formal methods and practical tools for automated hardware security validation. To identify and develop security-critical properties for hardware design, I developed SCIFinder, a methodology that leverages known vulnerabilities to mine and learn security invariants. I show that security vulnerabilities together with machine learning techniques can give us a set of security properties to detect both known and unknown security bugs in the OR1200 processor. I also proposed another method to develop security-critical properties by leveraging existing ones, and I built a tool, Transys, to translate security properties across similar or different versions of hardware designs. I demonstrate that translating security properties across AES hardware, RSA hardware and RISC processors is feasible and light-weight. Given the security properties, I developed Coppelia to validate the security of hardware designs. I proposed a hardware-oriented backward symbolic execution strategy to find violations and generate exploit programs. I successfully generate exploits for known security bugs on the OR1200 processor, and discovered and generated exploit programs for 4 unknown bugs across two different processors and architectures.Doctor of Philosoph
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