57 research outputs found

    Fast Scalar Multiplication on Elliptic Curve Cryptography in Selected Intervals Suitable For Wireless Sensor Networks

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    International audienceIn Wireless Sensor Networks (WSNs), providing a robust security mechanism with limited energy resources is very challenging because of sensor node's limited resources (computation, bandwidth, memory). Asymmetric-key can fulfill the requirement, but if the number of nodes is large, symmetric-key cryptography is the best natural method because of its scalability. Asymmetric-key cryptography is power-hungry; nevertheless, Elliptic Curve Cryptosystems (ECC) are feasible and more flexible for sensor nodes. Scalar multiplication is the most widely used operation on ECC. Various methods for fast scalar multiplication exist, but they are based on the binary/ternary representation of the scalar. In this paper, we present a novel technique to make fast scalar multiplication on Elliptic Curve Cryptosystems over prime field for light-weight embedded devices like sensor nodes. Our method significantly reduces the computation of scalar multiplication by an equivalent representation of points based on point order in a given interval. Since our technique can act as a support for most existing methods, after an analytical and efficiency analysis, we implement and evaluate its performance in different scenari

    An Attempt to Improve Data Security in Text Based Cryptosystem Using Elliptic Curve Cryptography

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    Data can be debilitated by hackers and spies. Cryptography helps us find better approaches to secure information in digital form. Elliptic Curve Cryptography (ECC) is favorable over numerous cryptographic systems because of smaller keys and quick key generation. This paper proposes a system which intends to provide multifold security in text based communication. The system has two main modules: encryption, and decryption. Encoding scheme which works on variable length text block mapping technique has been exhibited, thereby enhancing data security provided by ECC in text based cryptosystems. To leverage the advantages of ECC, it is being used in many applications. This papers attempts to utilize ECC in text based cryptosystems efficiently

    Enhancing an embedded processor core for efficient and isolated execution of cryptographic algorithms

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    We propose enhancing a reconfigurable and extensible embedded RISC processor core with a protected zone for isolated execution of cryptographic algorithms. The protected zone is a collection of processor subsystems such as functional units optimized for high-speed execution of integer operations, a small amount of local memory for storing sensitive data during cryptographic computations, and special-purpose and cryptographic registers to execute instructions securely. We outline the principles for secure software implementations of cryptographic algorithms in a processor equipped with the proposed protected zone. We demonstrate the efficiency and effectiveness of our proposed zone by implementing the most-commonly used cryptographic algorithms in the protected zone; namely RSA, elliptic curve cryptography, pairing-based cryptography, AES block cipher, and SHA-1 and SHA-256 cryptographic hash functions. In terms of time efficiency, our software implementations of cryptographic algorithms running on the enhanced core compare favorably with equivalent software implementations on similar processors reported in the literature. The protected zone is designed in such a modular fashion that it can easily be integrated into any RISC processor. The proposed enhancements for the protected zone are realized on an FPGA device. The implementation results on the FPGA confirm that its area overhead is relatively moderate in the sense that it can be used in many embedded processors. Finally, the protected zone is useful against cold-boot and micro-architectural side-channel attacks such as cache-based and branch prediction attacks

    Computing Hilbert class polynomials with the Chinese Remainder Theorem

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    We present a space-efficient algorithm to compute the Hilbert class polynomial H_D(X) modulo a positive integer P, based on an explicit form of the Chinese Remainder Theorem. Under the Generalized Riemann Hypothesis, the algorithm uses O(|D|^(1/2+o(1))log P) space and has an expected running time of O(|D|^(1+o(1)). We describe practical optimizations that allow us to handle larger discriminants than other methods, with |D| as large as 10^13 and h(D) up to 10^6. We apply these results to construct pairing-friendly elliptic curves of prime order, using the CM method.Comment: 37 pages, corrected a typo that misstated the heuristic complexit

    Efficient and Side-Channel Resistant Implementations of Next-Generation Cryptography

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    The rapid development of emerging information technologies, such as quantum computing and the Internet of Things (IoT), will have or have already had a huge impact on the world. These technologies can not only improve industrial productivity but they could also bring more convenience to people’s daily lives. However, these techniques have “side effects” in the world of cryptography – they pose new difficulties and challenges from theory to practice. Specifically, when quantum computing capability (i.e., logical qubits) reaches a certain level, Shor’s algorithm will be able to break almost all public-key cryptosystems currently in use. On the other hand, a great number of devices deployed in IoT environments have very constrained computing and storage resources, so the current widely-used cryptographic algorithms may not run efficiently on those devices. A new generation of cryptography has thus emerged, including Post-Quantum Cryptography (PQC), which remains secure under both classical and quantum attacks, and LightWeight Cryptography (LWC), which is tailored for resource-constrained devices. Research on next-generation cryptography is of importance and utmost urgency, and the US National Institute of Standards and Technology in particular has initiated the standardization process for PQC and LWC in 2016 and in 2018 respectively. Since next-generation cryptography is in a premature state and has developed rapidly in recent years, its theoretical security and practical deployment are not very well explored and are in significant need of evaluation. This thesis aims to look into the engineering aspects of next-generation cryptography, i.e., the problems concerning implementation efficiency (e.g., execution time and memory consumption) and security (e.g., countermeasures against timing attacks and power side-channel attacks). In more detail, we first explore efficient software implementation approaches for lattice-based PQC on constrained devices. Then, we study how to speed up isogeny-based PQC on modern high-performance processors especially by using their powerful vector units. Moreover, we research how to design sophisticated yet low-area instruction set extensions to further accelerate software implementations of LWC and long-integer-arithmetic-based PQC. Finally, to address the threats from potential power side-channel attacks, we present a concept of using special leakage-aware instructions to eliminate overwriting leakage for masked software implementations (of next-generation cryptography)

    Solving Small Exponential ECDLP in EC-based Additively Homomorphic Encryption and Applications

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    Additively Homomorphic Encryption (AHE) has been widely used in various applications, such as federated learning, blockchain, and online auctions. Elliptic Curve (EC) based AHE has the advantages of efficient encryption, homomorphic addition, scalar multiplication algorithms, and short ciphertext length. However, EC-based AHE schemes require solving a small exponential Elliptic Curve Discrete Logarithm Problem (ECDLP) when running the decryption algorithm, i.e., recovering the plaintext m∈{0,1}ℓm\in\{0,1\}^\ell from m∗Gm \ast G. Therefore, the decryption of EC-based AHE schemes is inefficient when the plaintext length ℓ>32\ell > 32. This leads to people being more inclined to use RSA-based AHE schemes rather than EC-based ones. This paper proposes an efficient algorithm called FastECDLP\mathsf{FastECDLP} for solving the small exponential ECDLP at 128128-bit security level. We perform a series of deep optimizations from two points: computation and memory overhead. These optimizations ensure efficient decryption when the plaintext length ℓ\ell is as long as possible in practice. Moreover, we also provide a concrete implementation and apply FastECDLP\mathsf{FastECDLP} to some specific applications. Experimental results show that FastECDLP\mathsf{FastECDLP} is far faster than the previous works. For example, the decryption can be done in 0.350.35 ms with a single thread when ℓ=40\ell = 40, which is about 3030 times faster than that of Paillier. Furthermore, we experiment with ℓ\ell from 3232 to 5454, and the existing works generally only consider ℓ≀32\ell \leq 32. The decryption only requires 11 second with 1616 threads when ℓ=54\ell = 54. In the practical applications, we can speed up model training of existing vertical federated learning frameworks by 44 to 1414 times. At the same time, the decryption efficiency is accelerated by about 140140 times in a blockchain financial system (ESORICS 2021) with the same memory overhead

    On the Cryptanalysis of Public-Key Cryptography

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    Nowadays, the most popular public-key cryptosystems are based on either the integer factorization or the discrete logarithm problem. The feasibility of solving these mathematical problems in practice is studied and techniques are presented to speed-up the underlying arithmetic on parallel architectures. The fastest known approach to solve the discrete logarithm problem in groups of elliptic curves over finite fields is the Pollard rho method. The negation map can be used to speed up this calculation by a factor √2. It is well known that the random walks used by Pollard rho when combined with the negation map get trapped in fruitless cycles. We show that previously published approaches to deal with this problem are plagued by recurring cycles, and we propose effective alternative countermeasures. Furthermore, fast modular arithmetic is introduced which can take advantage of prime moduli of a special form using efficient "sloppy reduction." The effectiveness of these techniques is demonstrated by solving a 112-bit elliptic curve discrete logarithm problem using a cluster of PlayStation 3 game consoles: breaking a public-key standard and setting a new world record. The elliptic curve method (ECM) for integer factorization is the asymptotically fastest method to find relatively small factors of large integers. From a cryptanalytic point of view the performance of ECM gives information about secure parameter choices of some cryptographic protocols. We optimize ECM by proposing carry-free arithmetic modulo Mersenne numbers (numbers of the form 2M – 1) especially suitable for parallel architectures. Our implementation of these techniques on a cluster of PlayStation 3 game consoles set a new record by finding a 241-bit prime factor of 21181 – 1. A normal form for elliptic curves introduced by Edwards results in the fastest elliptic curve arithmetic in practice. Techniques to reduce the temporary storage and enhance the performance even further in the setting of ECM are presented. Our results enable one to run ECM efficiently on resource-constrained platforms such as graphics processing units

    Why Cryptography Should Not Rely on Physical Attack Complexity

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    Hardware processors for pairing-based cryptography

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    Bilinear pairings can be used to construct cryptographic systems with very desirable properties. A pairing performs a mapping on members of groups on elliptic and genus 2 hyperelliptic curves to an extension of the finite field on which the curves are defined. The finite fields must, however, be large to ensure adequate security. The complicated group structure of the curves and the expensive field operations result in time consuming computations that are an impediment to the practicality of pairing-based systems. The Tate pairing can be computed efficiently using the ÉłT method. Hardware architectures can be used to accelerate the required operations by exploiting the parallelism inherent to the algorithmic and finite field calculations. The Tate pairing can be performed on elliptic curves of characteristic 2 and 3 and on genus 2 hyperelliptic curves of characteristic 2. Curve selection is dependent on several factors including desired computational speed, the area constraints of the target device and the required security level. In this thesis, custom hardware processors for the acceleration of the Tate pairing are presented and implemented on an FPGA. The underlying hardware architectures are designed with care to exploit available parallelism while ensuring resource efficiency. The characteristic 2 elliptic curve processor contains novel units that return a pairing result in a very low number of clock cycles. Despite the more complicated computational algorithm, the speed of the genus 2 processor is comparable. Pairing computation on each of these curves can be appealing in applications with various attributes. A flexible processor that can perform pairing computation on elliptic curves of characteristic 2 and 3 has also been designed. An integrated hardware/software design and verification environment has been developed. This system automates the procedures required for robust processor creation and enables the rapid provision of solutions for a wide range of cryptographic applications
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