Parasitic Effects Reduction for Wafer-Level Packaging of RF-Mems

In RF-MEMS packaging, next to the protection of movable structures, optimization of package electrical performance plays a very important role. In this work, a wafer-level packaging process has been investigated and optimized in order to minimize electrical parasitic effects. The RF-MEMS package concept used is based on a wafer-level bonding of a capping silicon substrate to an RF-MEMS wafer. The capping silicon substrate resistivity, substrate thickness and the geometry of through-substrate electrical interconnect vias have been optimized using finite-element electromagnetic simulations (Ansoft HFSS). Test structures for electrical characterization have been designed and after their fabrication, measurement results will be compared with simulations.Comment: Submitted on behalf of TIMA Editions (http://irevues.inist.fr/tima-editions

A Fully Parameterized Fem Model for Electromagnetic Optimization of an RF Mems Wafer Level Package

In this work, we present a fully parameterized capped transmission line model for electromagnetic optimization of a wafer level package (WLP) for RF MEMS applications using the Ansoft HFSS-TM electromagnetic simulator. All the degrees of freedom (DoF's) in the package fabrication can be modified within the model in order to optimize for losses and mismatch (capacitive and inductive couplings) introduced by the cap affecting the MEMS RF behaviour. Ansoft HFSS-TM was also validated for the simulation of capped RF MEMS devices by comparison against experimental data. A test run of capped 50 transmission lines and shorts was fabricated and tested.Comment: Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/EDA-Publishing

High performance 3-folded symmetric decoupled MEMS gyroscopes

This thesis reports, for the first time, on a novel design and architecture for realizing inertial grade gyroscope based on Micro-Electro-Mechanical Systems (MEMS) technology. The proposed device is suitable for high-precision Inertial Navigation Systems (INS). The new design has been investigated analytically and numerically by means of Finite Element Modeling (FEM) of the shapes, resonance frequencies and decoupling of the natural drive and sense modes of the various implementations. Also, famous phenomena known as spring softening and spring hardening are studied. Their effect on the gyroscope operation is modeled numerically in Matlab/Simulink platform. This latter model is used to predict the drive/sense mode matching capability of the proposed designs. Based on the comparison with the best recently reported performance towards inertial grade operation, it is expected that the novel architecture further lowers the dominant Brownian (thermo-mechanical) noise level by more than an order of magnitude (down to 0.08º/hr). Moreover, the gyroscope\u27s figure of merit, such as output sensitivity (150 mV/º/s), is expected to be improved by more than two orders of magnitude. This necessarily results in a signal to noise ratio (SNR) which is up to three orders of magnitude higher (up to 1,900mV/ º/hr). Furthermore, the novel concept introduced in this work for building MEMS gyroscopes allows reducing the sense parasitic capacitance by up to an order of magnitude. This in turn reduces the drive mode coupling or quadrature errors in the sensor\u27s output signal. The new approach employs Silicon-on-Insulator (SOI) substrates that allows the realization of large mass (\u3e1.6mg), large sense capacitance (\u3e2.2pF), high quality factors (\u3e21,000), large drive amplitude (~2-4 µm) and low resonance frequency (~3-4 KHz) as well as the consequently suppressed noise floor and reduced support losses for high-performance vacuum operation. Several challenges were encountered during fabrication that required developing high aspect ratio (up to 1:20) etching process for deep trenches (up to 500 µm). Frequency Response measurement platform was built for devices characterization. The measurements were performed at atmospheric pressures causing huge drop of the devices performance. Therefore, various MEMS gyroscope packaging technologies are studied. Wafer Level Packaging (WLP) is selected to encapsulate the fabricated devices under vacuum by utilizing wafer bonding. Through Silicon Via (TSV) technology was developed (as connections) to transfer the electrical signals (of the fabricated devices) outside the cap wafers

Mixed-Domain Fast Simulation of RF and Microwave MEMS-based Complex Networks within Standard IC Development Frameworks

MS technology (MicroElectroMechanical-System) has been successfully employed since a few decades in the sensors/actuators field. Several products available on the market nowadays include MEMS-based accelerometers and gyroscopes, pressure sensors and micro-mirrors matrices. Beside such well-established exploitation of MEMS technology, its use within RF (Radio Frequency) blocks and systems/sub-systems has been attracting, in recent years, the interest of the Scientific Community for the significant RF performances boosting that MEMS devices can enable. Several significant demonstrators of entirely MEMS-based lumped components, like variable capacitors (Hyung et al., 2008), inductors (Zine-El-Abidine et al., 2003) and micro-switches (Goldsmith et al., 1998), are reported in literature, exhibiting remarkable performance in terms of large tuning-range, very high Q-Factor and low-loss, if compared with the currently used components implemented in standard semiconductor technology (Etxeberria & Gracia, 2007, Rebeiz & Muldavin, 1999). Starting from the just mentioned basic lumped components, it is possible to synthesize entire functional sub-blocks for RF applications in MEMS technology. Also in this case, highly significant demonstrators are reported and discussed in literature concerning, for example, tuneable phase shifters (Topalli et al., 2008), switching matrices (Daneshmand & Mansour, 2007), reconfigurable impedance matching networks (Larcher et al., 2009) and power attenuators (Iannacci et al., 2009, a). In all the just listed cases, the good characteristics of RF-MEMS devices lead, on one side, to very highperformance networks and, on the other hand, to enabling a large reconfigurability of the entire RF/Microwave systems employing MEMS sub-blocks. In particular, the latter feature addresses two important points, namely, the reduction of hardware redundancy, being for instance the same Power Amplifier within a mobile phone suitable both in transmission (Tx) and reception (Rx) (De Los Santos, 2002), and the usability of the same RF apparatus in compliance with different communication standards (like GSM, UMTS, WLAN and so on) (Varadan, 2003). Beside the exploitation of MEMS technology within RF transceivers, other potentially successful uses of Microsystems are in the Microwave field, concerning, e.g., very compact switching units, especially appealing to satellite applications for the very reduced weight (Chung et al., 2007), and phase shifters in order to electronically steer short and mid-range radar systems for the homeland security and monitoring applications (Maciel et al., 2007). Given all the examples reported above, it is straightforward that the employment of a proper strategy in aiming at the RF-MEMS devices/networks optimum design is a key-issue in order to gain the best benefits, in terms of performance, that such technology enables to address. This is not an easy task as the behaviour of RF-MEMS transversally crosses different physical domains, namely, electrical, mechanical and electromagnetic, leading to a large number of trade-offs between mechanical and electrical/electromagnetic parameters, that typically cannot be managed within a unique commercial simulation tool. In this chapter, a complete approach for the fast simulation of single RF-MEMS devices as well as of complex networks is presented and discussed in details. The proposed method is based on a MEMS compact model library, previously developed by the author, within a commercial simulation environment for ICs (integrated circuits). Such software tool describes the electromechanical mixed-domain behaviour typical of MEMS devices. Moreover, through the chapter, the electromagnetic characteristics of RF-MEMS will be also addressed by means of extracted lumped element networks, enabling the whole electromechanical and electromagnetic design optimization of the RF-MEMS device or network of interest. In particular, significant examples about how to acc..

Utilisation of microsystems technology in radio frequency and microwave applications

The market trends of the rapidly growing communication systems require new product architectures and services that are only realisable by utilising technologies beyond that of planar integrated circuits. Microsystems technology (MST) is one such technology which can revolutionise radio frequency (RF) and microwave applications. This article discusses the enabling potential of the MST to meet the stringent requirements of modern communication systems. RF MST fabrication technologies and actuation mechanisms empower conventional processes by alleviating the substrate effects on passive devices and provide product designers with high quality versatile microscale components which can facilitate system integration and lead to novel architectures with enhanced robustness and reduced power consumption. An insight on the variety of components that can be fabricated using the MST is given, emphasizing their excellent electrical performance and versatility. Research issues that need to be addressed are also discussed. Finally, this article discusses the main approaches for integrating MST devices in RF and microwave applications together with the difficulties that need to be overcome in order to make such devices readily available for volume-production.peer-reviewe

Enhancements of MEMS design flow for Automotive and Optoelectronic applications

In the latest years we have been witnesses of a very rapidly and amazing grown of MicroElectroMechanical systems (MEMS) which nowadays represent the outstanding state-of-the art in a wide variety of applications from automotive to commercial, biomedical and optical (MicroOptoElectroMechanicalSystems). The increasing success of MEMS is found in their high miniaturization capability, thus allowing an easy integration with electronic circuits, their low manufacturing costs (that comes directly from low unit pricing and indirectly from cutting service and maintaining costs) and low power consumption. With the always growing interest around MEMS devices the necessity arises for MEMS designers to define a MEMS design flow. Indeed it is widely accepted that in any complex engineering design process, a well defined and documented design flow or procedure is vital. The top-level goal of a MEMS/MOEMS design flow is to enable complex engineering design in the shortest time and with the lowest number of fabrication iterations, preferably only one. These two characteristics are the measures of a good flow, because they translate directly to the industry-desirable reductions of the metrics “time to market” and “costs”. Like most engineering flows, the MEMS design flow begins with the product definition that generally involves a feasibility study and the elaboration of the device specifications. Once the MEMS specifications are set, a Finite Element Method (FEM) model is developed in order to study its physical behaviour and to extract the characteristic device parameters. These latter are used to develop a high level MEMS model which is necessary to the design of the sensor read out electronics. Once the MEMS geometry is completely defined and matches the device specifications, the device layout must be generated, and finally the MEMS sensor is fabricated. In order to have a MEMS sensor working according to specifications at first production run is essential that the MEMS design flow is as close as possible to the optimum design flow. The key factors in the MEMS design flow are the development of a sensor model as close as possible to the real device and the layout realization. This research work addresses these two aspects by developing optimized custom tools (a tool for layout check (LVS) and a tool for parasitic capacitances extraction) and new methodologies (a methodology for post layout simulations) which support the designer during the crucial steps of the design process as well as by presenting the models of two cases studies belonging to leading MEMS applications (a micromirror for laser projection system and a control loop for the shock immunity enhancement in gyroscopes for automotive applications)

Through-Silicon Vias in SiGe BiCMOS and Interposer Technologies for Sub-THz Applications

Im Rahmen der vorliegenden Dissertation zum Thema „Through-Silicon Vias in SiGe BiCMOS and Interposer Technologies for Sub-THz Applications“ wurde auf Basis einer 130 nm SiGe BiCMOS Technologie ein Through-Silicon Via (TSV) Technologiemodul zur Herstellung elektrischer Durchkontaktierungen für die Anwendung im Millimeterwellen und Sub-THz Frequenzbereich entwickelt. TSVs wurden mittels elektromagnetischer Simulationen modelliert und in Bezug auf ihre elektrischen Eigenschaften bis in den sub-THz Bereich bis zu 300 GHz optimiert. Es wurden die Wechselwirkungen zwischen Modellierung, Fertigungstechnologie und den elektrischen Eigenschaften untersucht. Besonderes Augenmerk wurde auf die technologischen Einflussfaktoren gelegt. Daraus schlussfolgernd wurde das TSV Technologiemodul entwickelt und in eine SiGe BiCMOS Technologie integriert. Hierzu wurde eine Via-Middle Integration gewählt, welche eine Freilegung der TSVs von der Wafer Rückseite erfordert. Durch die geringe Waferdicke von ca. 75 μm wird einen Carrier Wafer Handling Prozess verwendet. Dieser Prozess wurde unter der Randbedingung entwickelt, dass eine nachfolgende Bearbeitung der Wafer innerhalb der BiCMOS Pilotlinie erfolgen kann. Die Rückseitenbearbeitung zielt darauf ab, einen Redistribution Layer auf der Rückseite der BiCMOS Wafer zu realisieren. Hierzu wurde ein Prozess entwickelt, um gleichzeitig verschiedene TSV Strukturen mit variablen Geometrien zu realisieren und damit eine hohe TSV Design Flexibilität zu gewährleisten. Die TSV Strukturen wurden von DC bis über 300 GHz charakterisiert und die elektrischen Eigenschaften extrahiert. Dabei wurde gezeigt, dass TSV Verbindungen mit sehr geringer Dämpfung <1 dB bis 300 GHz realisierbar sind und somit ausgezeichnete Hochfrequenzeigenschaften aufweisen. Zuletzt wurden vielfältige Anwendungen wie das Grounding von Hochfrequenzschaltkreisen, Interposer mit Waveguides und 300 GHz Antennen dargestellt. Das Potential für Millimeterwellen Packaging und 3D Integration wurde evaluiert. TSV Technologien sind heutzutage in vielen Anwendungen z.B. im Bereich der Systemintegration von Digitalschaltkreisen und der Spannungsversorgung von integrierten Schaltkreisen etabliert. Im Rahmen dieser Arbeit wurde der Einsatz von TSVs für Millimeterwellen und dem sub-THz Frequenzbereich untersucht und die Anwendung für den sub-THz Bereich bis 300 GHz demonstriert. Dadurch werden neue Möglichkeiten der Systemintegration und des Packaging von Höchstfrequenzsystemen geschaffen.:Bibliographische Beschreibung List of symbols and abbreviations Acknowledgement 1. Introduction 2. FEM Modeling of BiCMOS & Interposer Through-Silicon Vias 3. Fabrication of BiCMOS & Silicon Interposer with TSVs 4. Characterization of BiCMOS Embedded Through-Silicon Vias 5. Applications 6. Conclusion and Future Work 7. Appendix 8. Publications & Patents 9. Bibliography 10. List of Figures and Table

High Speed Test Interface Module Using MEMS Technology

With the transient frequency of available CMOS technologies exceeding hundreds of gigahertz and the increasing complexity of Integrated Circuit (IC) designs, it is now apparent that the architecture of current testers needs to be greatly improved to keep up with the formidable challenges ahead. Test requirements for modern integrated circuits are becoming more stringent, complex and costly. These requirements include an increasing number of test channels, higher test-speeds and enhanced measurement accuracy and resolution. In a conventional test configuration, the signal path from Automatic Test Equipment (ATE) to the Device-Under-Test (DUT) includes long traces of wires. At frequencies above a few gigahertz, testing integrated circuits becomes a challenging task. The effects on transmission lines become critical requiring impedance matching to minimize signal reflection. AC resistance due to the skin effect and electromagnetic coupling caused by radiation can also become important factors affecting the test results. In the design of a Device Interface Board (DIB), the greater the physical separation of the DUT and the ATE pin electronics, the greater the distortion and signal degradation. In this work, a new Test Interface Module (TIM) based on MEMS technology is proposed to reduce the distance between the tester and device-under-test by orders of magnitude. The proposed solution increases the bandwidth of test channels and reduces the undesired effects of transmission lines on the test results. The MEMS test interface includes a fixed socket and a removable socket. The removable socket incorporates MEMS contact springs to provide temporary with the DUT pads and the fixed socket contains a bed of micro-pins to establish electrical connections with the ATE pin electronics. The MEMS based contact springs have been modified to implement a high-density wafer level test probes for Through Silicon Vias (TSVs) in three dimensional integrated circuits (3D-IC). Prototypes have been fabricated using Silicon On Insulator SOI wafer. Experimental results indicate that the proposed architectures can operate up to 50 GHz without much loss or distortion. The MEMS probes can also maintain a good elastic performance without any damage or deformation in the test phase