Phononics: Manipulating heat flow with electronic analogs and beyond

The form of energy termed heat that typically derives from lattice vibrations, i.e. the phonons, is usually considered as waste energy and, moreover, deleterious to information processing. However, with this colloquium, we attempt to rebut this common view: By use of tailored models we demonstrate that phonons can be manipulated like electrons and photons can, thus enabling controlled heat transport. Moreover, we explain that phonons can be put to beneficial use to carry and process information. In a first part we present ways to control heat transport and how to process information for physical systems which are driven by a temperature bias. Particularly, we put forward the toolkit of familiar electronic analogs for exercising phononics; i.e. phononic devices which act as thermal diodes, thermal transistors, thermal logic gates and thermal memories, etc.. These concepts are then put to work to transport, control and rectify heat in physical realistic nanosystems by devising practical designs of hybrid nanostructures that permit the operation of functional phononic devices and, as well, report first experimental realizations. Next, we discuss yet richer possibilities to manipulate heat flow by use of time varying thermal bath temperatures or various other external fields. These give rise to a plenty of intriguing phononic nonequilibrium phenomena as for example the directed shuttling of heat, a geometrical phase induced heat pumping, or the phonon Hall effect, that all may find its way into operation with electronic analogs.Comment: 24 pages, 16 figures, modified title and revised, accepted for publication in Rev. Mod. Phy

Carbon Based Nanoelectromechanical Resonators.

Owing to their light mass and high Young’s modulus, carbon nanotubes (CNTs) and graphene are promising candidates for nanoelectromechanical resonators capable of ultrasmall mass and force sensing. Unfortunately, the mass sensitivity of CNT resonators is impeded by the low quality factor (Q) caused by intrinsic losses. Therefore, one should minimize dissipations or seek an external way to enhance Q in order to overcome the fundamental limits. In this thesis, I first carried out a one-step direct transfer technique to fabricate pristine CNT nanoelectronic devices at ambient temperature. This process technique prevents unwanted contaminations, further reducing surface losses. Using this technique, CNT resonators was fabricated and a fully suspended CNT p-n diode with ideality factor equal to 1 was demonstrated as well. Subsequently, the frequency tuning mechanisms of CNT resonators were investigated in order to study their nonlinear dynamics. Downward frequency tuning caused by capacitive spring softening effect was demonstrated for the first time in CNT resonators adopting a dual-gate configuration. Leveraging the ability to modulate the spring constant, parametric amplification was demonstrated for Q enhancement in CNT resonators. Here, the simplest parametric amplification scheme was implemented by modulating the spring constant of CNTs at twice the resonance frequency through electrostatic gating. Consequently, at least 10 times Q enhancement was demonstrated and Q of 700 at room temperature was the highest record to date. Moreover, parametric amplification shows strong dependence on DC gate voltages, which is believed due to the difference of frequency tunability in different vibrational regimes. Graphene takes advantages over CNTs due to the availability of wafer-scale graphene films synthesized by chemical vapor deposition (CVD) method. Thus, I also examined graphene resonators fabricated from CVD graphene films. Ultra-high frequency (UHV) graphene resonators were demonstrated, and the Qs of graphene resonators are around 100. Future directions of graphene resonators include investigating the potential losses, exploring the origin of nonlinear damping, and demonstrating parametric amplification for Q enhancement.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/91487/1/chungwu_1.pd

CARBON NANOTUBE THIN FILM AS AN ELECTRONIC MATERIAL

Carbon nanotubes (CNT) are potential candidates for next-generation nanoelectronics devices. An individual CNT possesses excellent electrical properties, but it has been extremely challenging to integrate them on a large-scale. Alternatively, CNT thin films have shown great potential as electronic materials in low cost, large area transparent and flexible electronics. The primary focus of this dissertation is patterning, assembling, characterization and assessment of CNT thin films as electronic material. Since a CNT thin film contains both metallic and semiconducting CNTs, it can be used as an active layer as well as an electrode material by controlling the growth density and device geometry. The growth density is controlled by chemical vapor deposition and airbrushing methods. The device geometry is controlled by employing a transfer printing method to assemble CNT thin film transistors (TFT) on plastic substrates. Electrical transport properties of CNT TFTs are characterized by their conductance, transconductance and on/off ratio. Optimized device performance of CNT TFTs is realized by controlling percolation effects in a random network. Transport properties of CNTs are affected by the local environment. To study the intrinsic properties of CNTs, the environmental effects, such as those due to contact with the dielectric layer and processing chemicals, need to be eliminated. A facile fabrication method is used to mass produce as-grown suspended CNTs to study the transport properties of CNTs with minimal effects from the local environment. Transport and low-frequency noise measurements are conducted to probe the intrinsic properties of CNTs. Lastly, the unique contrast mechanism of the photoelectron emission microscopy (PEEM) is used to characterize the electric field effects in a CNT field effect transistor (FET). The voltage contrast mechanism in PEEM is first characterized by comparing measurements with simulations of a model system. Then the voltage contrast is used to probe the local field effects on a single CNT and a CNT thin film. This real-time imaging method is assessed for potential applications in testing of micron sized devices integrated in large scale

Carbon Nanotube Interconnects for End-of-Roadmap Semiconductor Technology Nodes

Advances in semiconductor technology due to aggressive downward scaling of on-chip feature sizes have led to rapid rises in resistivity and current density of interconnect conductors. As a result, current interconnect materials, Cu and W, are subject to performance and reliability constraints approaching or exceeding their physical limits. Therefore, alternative materials such as nanocarbons, metal silicides, and Ag nanowires are actively considered as potential replacements to meet such constraints. Among nanocarbons, carbon nanotube (CNT) is among the leading replacement candidate for on-chip interconnect vias due to its high aspect-ratio nanostructure and superior currentcarrying capacity to those of Cu, W, and other potential candidates. However, contact resistance of CNT with metal is a major bottleneck in device functionalization. To meet the challenge posed by contact resistance, several techniques are designed and implemented. First, the via fabrication and CNT growth processes are developed to increase the CNT packing density inside via and to ensure no CNT growth on via sidewalls. CNT vias with cross-sections down to 40 nm 40 nm are fabricated, which have linewidths similar to those used for on-chip interconnects in current integrated circuit manufacturing technology nodes. Then the via top contact is metallized to increase the total CNT area interfacing with the contact metal and to improve the contact quality and reproducibility. Current-voltage characteristics of individual fabricated CNT vias are measured using a nanoprober and contact resistance is extracted with a first-reported contact resistance extraction scheme for 40 nm linewidth. Based on results for 40 nm and 60 nm top-contact metallized CNT vias, we demonstrate that not only are their current-carrying capacities two orders of magnitude higher than their Cu and W counterparts, they are enhanced by reduced via resistance due to contact engineering. While the current-carrying capacities well exceed those projected for end-of-roadmap technology nodes, the via resistances remain a challenge to replace Cu and W, though our results suggest that further innovations in contact engineering could begin to overcome such challenge

From RF-Microsystem Technology to RF-Nanotechnology

The RF microsystem technology is believed to introduce a paradigm switch in the wireless revolution. Although only few companies are to date doing successful business with RF-MEMS, and on a case-by-case basis, important issues need yet to be addressed in order to maximize yield and performance stability and hence, outperform alternative competitive technologies (e.g. ferroelectric, SoS, SOI,…). Namely the behavior instability associated to: 1) internal stresses of the free standing thin layers (metal and/or dielectric) and 2) the mechanical contact degradation, be it ohmic or capacitive, which may occur due to low forces, on small areas, and while handling severe current densities.The investigation and understanding of these complex scenario, has been the core of theoretical and experimental investigations carried out in the framework of the research activity that will be presented here. The reported results encompass activities which go from coupled physics (multiphysics) modeling, to the development of experimental platforms intended to tackles the underlying physics of failure. Several original findings on RF-MEMS reliability in particular with respect to the major failure mechanisms such as dielectric charging, metal contact degradation and thermal induced phenomena have been obtained. The original use of advanced experimental setup (surface scanning microscopy, light interferometer profilometry) has allowed the definition of innovative methodology capable to isolate and separately tackle the different degradation phenomena under arbitrary working conditions. This has finally permitted on the one hand to shed some light on possible optimization (e.g. packaging) conditions, and on the other to explore the limits of microsystem technology down to the nanoscale. At nanoscale indeed many phenomena take place and can be exploited to either enhance conventional functionalities and performances (e.g. miniaturization, speed or frequency) or introduce new ones (e.g. ballistic transport). At nanoscale, moreover, many phenomena exhibit their most interesting properties in the RF spectrum (e.g. micromechanical resonances). Owing to the fact that today’s minimum manufacturable features have sizes comparable with the fundamental technological limits (e.g. surface roughness, metal grain size, …), the next generation of smart systems requires a switching paradigm on how new miniaturized components are conceived and fabricated. In fact endowed by superior electrical and mechanical performances, novel nanostructured materials (e.g. carbon based, as carbon nanotube (CNT) and graphene) may provide an answer to this endeavor. Extensively studied in the DC and in the optical range, the studies engaged in LAAS have been among the first to target microwave and millimiterwave transport properties in carbon-based material paving the way toward RF nanodevices. Preliminary modeling study performed on original test structures have highlighted the possibility to implement novel functionalities such as the coupling between the electromagnetic (RF) and microelectromechanical energy in vibrating CNT (toward the nanoradio) or the high speed detection based on ballistic transport in graphene three-terminal junction (TTJ). At the same time these study have contributed to identify the several challenges still laying ahead such as the development of adequate design and modeling tools (ballistic/diffusive, multiphysics and large scale factor) and practical implementation issues such as the effects of material quality and graphene-metal contact on the electrical transport. These subjects are the focus of presently on-going and future research activities and may represent a cornerstone of future wireless applications from microwave up to the THz range