Parallel Computing on a PC Cluster

The tremendous advance in computer technology in the past decade has made it possible to achieve the performance of a supercomputer on a very small budget. We have built a multi-CPU cluster of Pentium PC capable of parallel computations using the Message Passing Interface (MPI). We will discuss the configuration, performance, and application of the cluster to our work in physics.Comment: 3 pages, uses Latex and aipproc.cl

From flowers to palms: 40 years of policy for online learning

This year sees the 40th anniversary of the first policy paper regarding the use of computers in higher education in the United Kingdom. The publication of this paper represented the beginning of the field of learning technology research and practice in higher education. In the past 40 years, policy has at various points drawn from different communities and provided the roots for a diverse field of learning technology researchers and practitioners. This paper presents a review of learning technology-related policy over the past 40 years. The purpose of the review is to make sense of the current position in which the field finds itself, and to highlight lessons that can be learned from the implementation of previous policies. Conclusions drawn from the review of 40 years of learning technology policy suggest that there are few challenges that have not been faced before as well as a potential return to individual innovation

Implementation of the conjugate gradient algorithm on FPGA devices

Results of porting parts of the Lattice Quantum Chromodynamics code to modern FPGA devices are presented. A single-node, double precision implementation of the Conjugate Gradient algorithm is used to invert numerically the Dirac-Wilson operator on a 4-dimensional grid on a Xilinx Zynq evaluation board. The code is divided into two software/hardware parts in such a way that the entire multiplication by the Dirac operator is performed in programmable logic, and the rest of the algorithm runs on the ARM cores. Optimized data blocks are used to efficiently use data movement infrastructure allowing to reach intervals of 1 clock cycle. We show that the FPGA implementation can offer a comparable performance compared to that obtained using Intel Xeon Phi KNL.Comment: Proceedings of the 36th Annual International Symposium on Lattice Field Theory - LATTICE201