Parallel multiplication and powering of polynomials

AbstractThis paper examines the most efficient known serial and parallel algorithms for multiplying and powering polynomials. For sparse polynomials the Simp algorithm multiplies using a simple divide and conquer approach, and the NOMC algorithm computes powers using a multinomial expansion. For dense polynomials the FFT multiplies and powers by evaluating polynomials at a set of points, performing pointwise multiplication or powering, and interpolating a polynomial through the results. Practical issues of applying these algorithms in algebraic manipulation systems are discussed

Experimental Studies Towards a DC-DC Conversion Powering Scheme for the CMS Silicon Strip Tracker at SLHC

The upgrade of the CMS silicon tracker for the Super-LHC presents many challenges. The distribution of power to the tracker is considered particularly difficult, as the tracker power consumption is expected to be similar to or higher than today, while the operating voltage will decrease and power cables cannot be exchanged or added. The CMS tracker has adopted parallel powering with DC-DC conversion as the baseline solution to the powering problem. In this paper, experimental studies of such a DC-DC conversion powering scheme are presented, including system test measurements with custom DC-DC converters and current strip tracker structures, studies of the detector susceptibility to conductive noise, and simulations of the effect of novel powering schemes on the strip tracker material budget

Communication and Powering Scheme for Wireless and Battery-Less Measurement

The paper presents solution for wireless and battery-less measurement in the enclosed areas. The principle is based on passive RFID, nevertheless this paper is focused on high power-demanding applications such as MEMS accelerometers, gas sensors, piezoresistive strain gauges, etc. Standard FRID communication scheme (sensing the input current change on the primary side) cannot be used in this case, because the communication channel is overloaded by the high power load. Paper presents possible solution which is based on the dual frequency scheme – one frequency for powering and other for the communication. This is ensuring capability for measurement up to several centimeters on the frequency bands 125 kHz and 375 kHz. It can be suitable for continual measurement in isolated systems such as the rotating objects, concrete walls, enclosed plastic barrels, high temperature chambers etc

An efficient genetic algorithm for large-scale transmit power control of dense and robust wireless networks in harsh industrial environments

The industrial wireless local area network (IWLAN) is increasingly dense, due to not only the penetration of wireless applications to shop floors and warehouses, but also the rising need of redundancy for robust wireless coverage. Instead of simply powering on all access points (APs), there is an unavoidable need to dynamically control the transmit power of APs on a large scale, in order to minimize interference and adapt the coverage to the latest shadowing effects of dominant obstacles in an industrial indoor environment. To fulfill this need, this paper formulates a transmit power control (TPC) model that enables both powering on/off APs and transmit power calibration of each AP that is powered on. This TPC model uses an empirical one-slope path loss model considering three-dimensional obstacle shadowing effects, to enable accurate yet simple coverage prediction. An efficient genetic algorithm (GA), named GATPC, is designed to solve this TPC model even on a large scale. To this end, it leverages repair mechanism-based population initialization, crossover and mutation, parallelism as well as dedicated speedup measures. The GATPC was experimentally validated in a small-scale IWLAN that is deployed a real industrial indoor environment. It was further numerically demonstrated and benchmarked on both small- and large-scales, regarding the effectiveness and the scalability of TPC. Moreover, sensitivity analysis was performed to reveal the produced interference and the qualification rate of GATPC in function of varying target coverage percentage as well as number and placement direction of dominant obstacles. (C) 2018 Elsevier B.V. All rights reserved

Efficient long division via Montgomery multiply

We present a novel right-to-left long division algorithm based on the Montgomery modular multiply, consisting of separate highly efficient loops with simply carry structure for computing first the remainder (x mod q) and then the quotient floor(x/q). These loops are ideally suited for the case where x occupies many more machine words than the divide modulus q, and are strictly linear time in the "bitsize ratio" lg(x)/lg(q). For the paradigmatic performance test of multiword dividend and single 64-bit-word divisor, exploitation of the inherent data-parallelism of the algorithm effectively mitigates the long latency of hardware integer MUL operations, as a result of which we are able to achieve respective costs for remainder-only and full-DIV (remainder and quotient) of 6 and 12.5 cycles per dividend word on the Intel Core 2 implementation of the x86_64 architecture, in single-threaded execution mode. We further describe a simple "bit-doubling modular inversion" scheme, which allows the entire iterative computation of the mod-inverse required by the Montgomery multiply at arbitrarily large precision to be performed with cost less than that of a single Newtonian iteration performed at the full precision of the final result. We also show how the Montgomery-multiply-based powering can be efficiently used in Mersenne and Fermat-number trial factorization via direct computation of a modular inverse power of 2, without any need for explicit radix-mod scalings.Comment: 23 pages; 8 tables v2: Tweak formatting, pagecount -= 2. v3: Fix incorrect powers of R in formulae [7] and [11] v4: Add Eldridge & Walter ref. v5: Clarify relation between Algos A/A',D and Hensel-div; clarify true-quotient mechanics; Add Haswell timings, refs to Agner Fog timings pdf and GMP asm-timings ref-page. v6: Remove stray +bw in MULL line of Algo D listing; add note re byte-LUT for qinv_

An integrated DC-DC step-up charge pump and step-down converter in 130 nm technology

After the LHC luminosity upgrade the number of readout channels in the ATLAS Inner Detector will be increased by one order of magnitude and delivering the power to the front-end electronics as well as cooling will become a critical system issue. Therefore a new solution for powering the readout electronics has to be worked out. Two main approaches for the power distribution are under development, the serial powering of a chain of modules and the parallel powering with a DCDC conversion stage on the detector. In both cases switchedcapacitor converters in the CMOS front-end chips will be used. In the paper we present the design study of a step-up charge pump and a step-down converter. In optimized designs power efficiency of 85 % for the step-up converter and 92 % for the step-down converter has been achieved

A No-Go Theorem for Derandomized Parallel Repetition: Beyond Feige-Kilian

In this work we show a barrier towards proving a randomness-efficient parallel repetition, a promising avenue for achieving many tight inapproximability results. Feige and Kilian (STOC'95) proved an impossibility result for randomness-efficient parallel repetition for two prover games with small degree, i.e., when each prover has only few possibilities for the question of the other prover. In recent years, there have been indications that randomness-efficient parallel repetition (also called derandomized parallel repetition) might be possible for games with large degree, circumventing the impossibility result of Feige and Kilian. In particular, Dinur and Meir (CCC'11) construct games with large degree whose repetition can be derandomized using a theorem of Impagliazzo, Kabanets and Wigderson (SICOMP'12). However, obtaining derandomized parallel repetition theorems that would yield optimal inapproximability results has remained elusive. This paper presents an explanation for the current impasse in progress, by proving a limitation on derandomized parallel repetition. We formalize two properties which we call "fortification-friendliness" and "yields robust embeddings." We show that any proof of derandomized parallel repetition achieving almost-linear blow-up cannot both (a) be fortification-friendly and (b) yield robust embeddings. Unlike Feige and Kilian, we do not require the small degree assumption. Given that virtually all existing proofs of parallel repetition, including the derandomized parallel repetition result of Dinur and Meir, share these two properties, our no-go theorem highlights a major barrier to achieving almost-linear derandomized parallel repetition

A novel enhanced connection of AC/AC powertrain for HEV - modelling and simulation results

The paper deals with a novel enhanced connection of AC/AC powertrain for Hybrid Electric Vehicles (HEV). The substantial contribution of such a connection is the absence of 4QC auxiliary converter needed for autonomous and hybrid operational modes and its compensation by power-lesser 0x5 matrix converter. The main advantages of a simplified connection are, beside smaller auxiliary converter sizing, also possible better efficiency of the HEV powertrain. So, powertrain operation in autonomous traction accu-battery modes uses direct 0x5 configuration of traction 3x5 MxC matrix converter, and in hybrid modes of Internal Combustion Engine (ICE) and accu-battery uses besides traction 3x5 MxC matrix converter the auxiliary 0x5 matrix converter. Modeling and simulation using Matlab-Simulink environment of traction powertrain configuration in autonomous modes are presented in the paper as well as all simulation experiment result