462 research outputs found

    The Chameleon Architecture for Streaming DSP Applications

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    We focus on architectures for streaming DSP applications such as wireless baseband processing and image processing. We aim at a single generic architecture that is capable of dealing with different DSP applications. This architecture has to be energy efficient and fault tolerant. We introduce a heterogeneous tiled architecture and present the details of a domain-specific reconfigurable tile processor called Montium. This reconfigurable processor has a small footprint (1.8 mm2^2 in a 130 nm process), is power efficient and exploits the locality of reference principle. Reconfiguring the device is very fast, for example, loading the coefficients for a 200 tap FIR filter is done within 80 clock cycles. The tiles on the tiled architecture are connected to a Network-on-Chip (NoC) via a network interface (NI). Two NoCs have been developed: a packet-switched and a circuit-switched version. Both provide two types of services: guaranteed throughput (GT) and best effort (BE). For both NoCs estimates of power consumption are presented. The NI synchronizes data transfers, configures and starts/stops the tile processor. For dynamically mapping applications onto the tiled architecture, we introduce a run-time mapping tool

    Mapping DSP algorithms to a reconfigurable architecture Adaptive Wireless Networking (AWGN)

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    This report will discuss the Adaptive Wireless Networking project. The vision of the Adaptive Wireless Networking project will be given. The strategy of the project will be the implementation of multiple communication systems in dynamically reconfigurable heterogeneous hardware. An overview of a wireless LAN communication system, namely HiperLAN/2, and a Bluetooth communication system will be given. Possible implementations of these systems in a dynamically reconfigurable architecture are discussed. Suggestions for future activities in the Adaptive Wireless Networking project are also given

    Design and Analysis of Heterogeneous DSP/FPGA Based Architectures for 3GPP Wireless Systems

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    This paper shows how iterative hardware/software partitioning in heterogeneous DSP/FPGA based embedded systems can be utilized to achieve real-time deadlines of modern 3GPP wireless equalization workloads. By utilizing a well defined set of application partitioning criteria in tandem with SOC simulation tools, we are able to show a greater than six fold improvement in application performance and ultimately meet, and even exceed real-time data processing deadlines

    State of the art baseband DSP platforms for Software Defined Radio: A survey

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    Software Defined Radio (SDR) is an innovative approach which is becoming a more and more promising technology for future mobile handsets. Several proposals in the field of embedded systems have been introduced by different universities and industries to support SDR applications. This article presents an overview of current platforms and analyzes the related architectural choices, the current issues in SDR, as well as potential future trends.Peer reviewe

    A genetic algorithm-assisted semi-adaptive MMSE multi-user detection for MC-CDMA mobile communication systems

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    In this work, a novel Minimum-Mean Squared-Error (MMSE) multi-user detector is proposed for MC-CDMA transmission systems working over mobile radio channels characterized by time-varying multipath fading. The proposed MUD algorithm is based on a Genetic Algorithm (GA)-assisted per-carrier MMSE criterion. The GA block works in two successive steps: a training-aided step aimed at computing the optimal receiver weights using a very short training sequence, and a decision-directed step aimed at dynamically updating the weights vector during a channel coherence period. Numerical results evidenced BER performances almost coincident with ones yielded by ideal MMSE-MUD based on the perfect knowledge of channel impulse response. The proposed GA-assisted MMSE-MUD clearly outperforms state-of-the-art adaptive MMSE receivers based on deterministic gradient algorithms, especially for high number of transmitting users
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