Investigation of performance issues affecting optical circuit and packet switched WDM networks

Optical switching represents the next step in the evolution of optical networks. This thesis describes work that was carried out to examine performance issues which can occur in two distinct varieties of optical switching networks. Slow optical switching in which lightpaths are requested, provisioned and torn down when no longer required is known as optical circuit switching (OCS). Services enabled by OCS include wavelength routing, dynamic bandwidth allocation and protection switching. With network elements such as reconfigurable optical add/drop multiplexers (ROADMs) and optical cross connects (OXCs) now being deployed along with the generalized multiprotocol label switching (GMPLS) control plane this represents the current state of the art in commercial networks. These networks often employ erbium doped fiber amplifiers (EDFAs) to boost the optical signal to noise ratio of the WDM channels and as channel configurations change, wavelength dependent gain variations in the EDFAs can lead to channel power divergence that can result in significant performance degradation. This issue is examined in detail using a reconfigurable wavelength division multiplexed (WDM) network testbed and results show the severe impact that channel reconfiguration can have on transmission performance. Following the slow switching work the focus shifts to one of the key enabling technologies for fast optical switching, namely the tunable laser. Tunable lasers which can switch on the nanosecond timescale will be required in the transmitters and wavelength converters of optical packet switching networks. The switching times and frequency drifts, both of commercially available lasers, and of novel devices are investigated and performance issues which can arise due to this frequency drift are examined. An optical packet switching transmitter based on a novel label switching technique and employing one of the fast tunable lasers is designed and employed in a dual channel WDM packet switching system. In depth performance evaluations of this labelling scheme and packet switching system show the detrimental impact that wavelength drift can have on such systems

Future benefits and applications of intelligent on-board processing to VSAT services

The trends and roles of VSAT services in the year 2010 time frame are examined based on an overall network and service model for that period. An estimate of the VSAT traffic is then made and the service and general network requirements are identified. In order to accommodate these traffic needs, four satellite VSAT architectures based on the use of fixed or scanning multibeam antennas in conjunction with IF switching or onboard regeneration and baseband processing are suggested. The performance of each of these architectures is assessed and the key enabling technologies are identified

Hardware Acceleration of Header Field Extraction

Většina síťových zařízení pro svou činnost potřebuje získávat položky z hlaviček různých protokolů obsažených v přijatých paketech. Tato práce se zabývá návrhem efektivní jednotky umožňující analýzu hlaviček a extrakci dat v závislosti na požadavcích konkrétní aplikace. Speciální důraz je kladen na možnost zpracování protokolů druhé, třetí a čtvrté síťové vrstvy včetně tunelování paketů. Podporované protokoly je možné volit na základě specifických požadavků různých aplikací. Pro analýzu dat je využíván model založený na pravé lineární gramatice transformované na konečný automat. Technologie FPGA umožňuje skloubení konfigurovatelnosti softwaru s rychlostí hardwarového zpracování nutného pro vysokorychlostní sítě. Implementovanou jednotku je možné využít i pro sítě s rychlostí 40 Gb/s. Extrahované položky je možné vybírat i za běhu jednotky.Most network devices need to obtain specific packet header fields belonging to different network protocol headers for correct functionality. This work aims to create an efficient unit capable of application-specific packet header analysis and data extraction. The proposed unit deals with protocols used on L2, L3, and L4 layers of ISO/OSI model including tunneled protocols; it is possible to specify protocols which are to be supported. Data analysis is based on right linear grammar transformed to finite automaton. Hardware acceleration has to be exploited in order to achieve data processing of all traffic exchanged over high-speed networks. Using FPGA technology it is possible to achieve both fast and configurable data processing. The designed unit is able to process data on up to 40 Gbps networks. On-the-fly configuration of extracted header fields is supported.

Algorithms for quality of service provisioning and enhancement in optical burst switched networks

Ph.DDOCTOR OF PHILOSOPH