793 research outputs found

    Numerical modelling of a high temperature power module technology with SiC devices for high density power electronics

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    This paper presents the development of a new packaging technology using silicon carbide (SiC) power devices. These devices will be used in the next power electronic converters. They will provide higher densities, switching frequencies and operating temperature than current Si technologies. Thus the new designed packaging has to take into account such new constraints. The presented work tries to demonstrate the importance of packaging designs for the performance and reliability of integrated SiC power modules. In order to increase the integrated density in power modules, packaging technologies consisting of two stacked substrates with power devices and copper bumps soldered between them were proposed into two configurations. Silver sintering technique is used as die-attach material solution. In order to assess the assembling process and robustness of these packaging designs, the thermo-mechanical behaviour is studied using FEM modelling. Finally, some recommendations are made in order to choose the suitable design for reliable power module

    High Temperature LTCC based SiC Double-sided Cooling Power Electronic Module

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    This objective of this dissertation research is to investigate a module packaging technology for high temperature double-sided cooling power electronic module application. A high-temperature wire-bondless low-temperature co-fired ceramic (LTCC) based double-sided cooling power electronic module was designed, simulated and fabricated. In this module, the conventional copper base plate is removed to reduce the thermal resistance between the device junctions to the heat sink and to improve the reliability of the module by eliminating the large area solder joint between the power substrate and the copper base plate. A low-temperature co-fired ceramic (LTCC) substrate with cavities and vias is used as the dielectric material between the top and bottom substrates and it also serves as the die frame. A nano silver attach material is used to enable the high-temperature operation. Thermal and thermo-mechanical simulations were performed to evaluate the advantages of the LTCC double-sided power module structure and compared to other reported module structures and its wire-bonded counterpart. The junction-to-case thermal resistance for the power module without a copper base plate is 0.029oC/W, which is smaller than that of the power module with a copper base plate. Thermo-mechanical simulation reveals that double-sided cooling power modules generate higher thermal stresses when compared to that of the single-sided cooling power modules which indicates the trade-off between the junction temperature and the thermo-mechanical stress. Electrical and thermal characterizations were performed to test the functionality of the fabricated module using a 1200V rated voltage blocking capability. The forward and reverse characteristics of the SiC power MOSFET and SiC diode module were tested to 200°C and they demonstrated the functionality of the power module. The junction-to-ambient thermal resistance of the proposed module is shown to reduce by 11% compared to the wire-bonded equivalent which shows an improvement of the thermal performance of the double-sided cooling structure. Finally, the reliability of the several power substrates was evaluated based on the thermal stress and fatigue life simulation of the bonding layer to determine the mechanical weakest spots of the power module. Thermal cycling experiments were also conducted to validate the simulation results

    A Double-Sided Stack Low-Inductance Wire-Bondless SiC Power Module with a Ceramic Interposer

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    The objective of this dissertation research is to develop a novel three-dimensional (3-D) wire bondless power module package for silicon carbide (SiC) power devices to achieve a low parasitic inductance and an improved thermal performance. A half-bridge module consisting of 900-V SiC MOSFETs is realized to minimize stray parasitic inductance as well as to provide both vertical and horizontal cooling paths to maximize heat dissipation. The proposed 3-D power module package was designed, simulated, fabricated and tested. In this module, low temperature co-fired ceramic (LTCC) substrate with vias is utilized as an interposer of which both top and bottom sides are used as die attachment surfaces, the SiC MOSFET bare dies are flip-chip attached on the LTCC interposer using nickel-plated copper balls, high horizontally thermal conductive material is integrated into the LTCC interposer to improve its thermal dissipation capability. Hence, the LTCC interposer provides both electrical and thermal routing and the nickel-plated copper balls replace bond wires in conventional planar power module as the electrical interconnections for the SiC power devices. On the other side, direct bond copper (DBC) substrate are used at both top and bottom sides of the 3-D module to achieve electrical path for SiC devices and double-sided cooling. As a result, 3D power routing is achieved to reduce stray inductance, and both vertical and lateral paths are utilized to spread heat generated by the power devices in this compact module architecture. Electrical simulation was performed to extract the parasitic inductances in the 3-D package and compared to other reported module packages. Low loop parasitic inductance of 4.5nH at a frequency of 1MHz is achieved after optimization. Thermal and thermo-mechanical simulations were also conducted to evaluate the thermal performance and mechanical stress of the proposed module structure. The fabrication process flow of the 3-D wire bondless module is developed and presented. The fabricated half-bridge module was evaluated experimentally by double-pulse test and thermal cycling test. Significant reduction in voltage overshoot and ringing was observed during the double-pulse test, and the module shows no degradation after thermal cycling test. To push the double-sided wire-bondless module to higher voltage application, a 3.3-kV SiC double-sided wire-bondless common source module was designed, fabricated, and tested. Electric field simulations were performed considering the associated challenge of increased electric field strength in the higher-voltage wire-bondless module. High voltage blocking test was added to evaluate the high voltage operation capability as well

    High-Performance Packaging Technology for Wide Bandgap Semiconductor Modules

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    The properties of wide band gap (WBG) semiconductors are beneficial to power electronics applications ranging from consumer electronics and renewable energy to electric vehicles and high-power traction applications like high-speed trains. WBG devices, properly integrated, will allow power electronics systems to be smaller, lighter, operate at higher temperatures, and at higher frequencies than previous generations of Si-based systems. These will contribute to higher efficiency, and therefore, lower lifecycle costs and lower CO2 emissions. Over 20 years have been spent developing WBG materials, low-defect-density wafers, epitaxy, and device fabrication and processing technology. In power electronics applications, devices are normally packaged into large integrated modules with electrical, mechanical and thermal connection to the system and control circuit. The first generations of WBG device have used conventional or existing module designs to allow drop-in replacement of Si devices; this approach limits the potential benefit. To realize the full potential of WBG devices, especially the higher operating temperatures and faster switching frequency, a new generation of packaging design and technology concepts must be widely implemented

    The Development of Novel Interconnection Technologies for 3D Packaging of Wire Bondless Silicon Carbide Power Modules

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    This dissertation advances the cause for the 3D packaging and integration of silicon carbide power modules. 3D wire bondless approaches adopted for enhancing the performance of silicon power modules were surveyed, and their merits were assessed to serve as a vision for the future of SiC power packaging. Current efforts pursuing 3D wire bondless SiC power modules were investigated, and the concept for a novel SiC power module was discussed. This highly-integrated SiC power module was assessed for feasibility, with a focus on achieving ultralow parasitic inductances in the critical switching loops. This will enable higher switching frequencies, leading to a reduction in the size of the passive devices in the system and resulting in systems with lower weight and volume. The proposed concept yielded an order-of-magnitude reduction in system parasitics, alongside the possibility of a compact system integration. The technological barriers to realizing these concepts were identified, and solutions for novel interconnection schemes were proposed and evaluated. A novel sintered silver preform was developed to facilitate flip-chip interconnections for a bare-die power device while operating in a high ambient temperature. The preform was demonstrated to have 3.75× more bonding strength than a conventional sintered silver bond and passed rigorous thermal shock tests. A chip-scale and flip-chip capable power device was also developed. The novel package combined the ease of assembly of a discrete device with a performance exceeding a wire bonded module. It occupied a 14× smaller footprint than a discrete device, and offered power loop inductances which were less than a third of a conventional wire bonded module. A detailed manufacturing process flow and qualification is included in this dissertation. These novel devices were implemented in various electrical systems—a discrete Schottky barrier diode package, a half-bridge module with external gate drive, and finally a half-bridge with integrated gate driver in-module. The results of these investigations have been reported and their benefits assessed. The wire bondless modules showed \u3c 5% overshoot under all test conditions. No observable detrimental effects due to dv/dt were observed for any of the modules even under aggressive voltage slew rates of 20-25 V/ns

    Status and Trend of Power Semiconductor Module Packaging for Electric Vehicles

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    Power semiconductor modules are the core components in power-train system of hybrid and electric vehicles (HEV/EV). With the global interests and efforts to popularize HEV/EV, automotive module has become one of the fast growing sectors of power semiconductor industry. However, the comprehensive requirements in power, frequency, efficiency, robustness, reliability, weight, volume, and cost of automotive module are stringent than industrial products due to extremely high standards of vehicle safety and harsh environment. The development of automotive power module is facing comprehensive challenges in designing of structure, material, and assembly technology. In this chapter, the status and trend of power semiconductor module packaging for HEV/EV are investigated. Firstly, the functionality of power electronics and module in HEV/EV power-train system, as well as the performance requirements by automotive industry, is addressed. A general overview of HEV/EV module design and manufacturing is discussed. Then, the typical state-of-the-art commercial and custom HEV/EV power modules are reviewed and evaluated. Lastly, the packaging trends of automotive module are investigated. The advanced assembly concept and technology are beneficial to thermal management, minimized parasitic parameters, enhancement of thermal and mechanical reliability, and the reduction of weight, volume, and cost

    Modular assembly of a single phase inverter based on integrated functional block

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    This paper presents an original modular plug-in type assembly approach for a single phase-inverter. The main focus here is, indicatively, on the power range 1-20 kW, but the methodology can be transferred to higher power levels, too. At the core of the inverter lies a power-dense double-sided-cooled half-bridge power switch architecture with integrated cooler, which is interconnected to filter elements, gate-driver and control circuitry by means of compact flat connectors. The integration exercise targets, on the one hand, the optimization of the power switch performance and reliability, as well as the reduction of circuit parasitic elements; on the other, the production of a system compatible with maintenance and repairing, featuring minimized impact of single component failure on the system maintenance and repair cost and thus on its availability. Preliminary experimental tests demonstrate the nominal functionality of the inverter

    Evaluation of Thermal Management Solutions for Power Semiconductors

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    This thesis addresses the thermal management and reliability concerns of power semiconductor devices from die to system level packaging design. Power electronics is a continuously evolving and challenging field. Systems continue to evolve, demanding increasing functionality within decreasing packaging volume, whilst maintaining stringent reliability requirements. This typically means higher volumetric and gravimetric power densities, which require effective thermal management solutions, to maintain junction temperatures of devices below their maximum and to limit thermally induced stress for the packaging medium. A comparison of thermal performance of Silicon and Silicon Carbide power semiconductor devices mounted on Polycrystalline Diamond (PCD) and Aluminum Nitride (AlN) substrates has been carried out. Detailed simulation and experimental analysis techniques show a 74% reduction in junction to case thermal resistance (Rth (j-c)) can be achieved by replacing the AlN insulating layer with PCD substrate. In order to improve the thermal performance and power density of polycrystalline diamond substrates further at the system level, direct liquid cooling technique of Direct Bonded Copper (DBC) substrates were performed. An empirical model was used to analyse the geometric and thermo-hydraulic dependency upon thermal performance of circular micro pins fins. Results show that micro pin fin direct cooling of DBC can reduce the number of thermal layers in the system, and reduce the thermal resistance by 59% when compared to conventional DBC cooling without a base plate. Thermal management and packaging solutions for the wide band gap semiconductors, such as GaN, is also described in detail. Comparisons of face up and flip chip thermal performance of GaN on Sapphire, Silicon and 6H-SiC substrates in a T0-220 package system is presented. Detailed thermal simulation results analysed using ANSYSÂź show that a flip chip mounted GaN on sapphire substrate can reduce junction to case thermal resistance by 28% when compared against the face up mounted technique

    Design And Characterization Of High Temperature Packaging For Wide-bandgap Semiconductor Devices

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    Advances in wide-bandgap semiconductor devices have increased the allowable operating temperature of power electronic systems. High-temperature devices can benefit applications such as renewable energy, electric vehicles, and space-based power electronics that currently require bulky cooling systems for silicon power devices. Cooling systems can typically be reduced in size or removed by adopting wide-bandgap semiconductor devices, such as silicon carbide. However, to do this, semiconductor device packaging with high reliability at high temperatures is necessary. Transient liquid phase (TLP) die-attach has shown in literature to be a promising bonding technique for this packaging need. In this work TLP has been comprehensively investigated and characterized to assess its viability for high-temperature power electronics applications. The reliability and durability of TLP die-attach was extensively investigated utilizing electrical resistivity measurement as an indicator of material diffusion in gold-indium TLP samples. Criteria of ensuring diffusive stability were also developed. Samples were fabricated by material deposition on glass substrates with variant Au–In compositions but identical barrier layers. They were stressed with thermal cycling to simulate their operating conditions then characterized and compared. Excess indium content in the die-attach was shown to have poor reliability due to material diffusion through barrier layers while samples containing suitable indium content proved reliable throughout the thermal cycling process. This was confirmed by electrical resistivity measurement, EDS, FIB, and SEM characterization. Thermal and mechanical characterization of TLP die-attached samples was also performed to gain a newfound understanding of the relationship between TLP design parameters and die-attach properties. Samples with a SiC diode chip TLP bonded to a copper metalized silicon nitride iv substrate were made using several different values of fabrication parameters such as gold and indium thickness, Au–In ratio, and bonding pressure. The TLP bonds were then characterized for die-attach voiding, shear strength, and thermal impedance. It was found that TLP die-attach offers high average shear force strength of 22.0 kgf and a low average thermal impedance of 0.35 K/W from the device junction to the substrate. The influence of various fabrication parameters on the bond characteristics were also compared, providing information necessary for implementing TLP die-attach into power electronic modules for high-temperature applications. The outcome of the investigation on TLP bonding techniques was incorporated into a new power module design utilizing TLP bonding. A full half-bridge inverter power module for low-power space applications has been designed and analyzed with extensive finite element thermomechanical modeling. In summary, TLP die-attach has investigated to confirm its reliability and to understand how to design effective TLP bonds, this information has been used to design a new high-temperature power electronic module
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