Substitution-based approach for linguistic steganography using antonym

Steganography has been a part of information technology security since a long time ago. The study of steganography is getting attention from researchers because it helps to strengthen the security in protecting content message during this era of Information Technology. In this study, the use of substitution-based approach for linguistic steganography using antonym is proposed where it is expected to be an alternative to the existing substitution approach that using synonym. This approach still hides the message as existing approach but its will change the semantic of the stego text from cover text. A tool has been developed to test the proposed approach and it has been verified and validated. This proposed approach has been verified based on its character length stego text towards the cover text, bit size types of the secret text towards the stego text and bit size types of the cover text towards the stego text. It has also been validated using four parameters, which are precision, recall, f-measure, and accuracy. All the results showed that the proposed approach was very effective and comparable to the existing synonym-based substitution approach

Ladder Metamodeling & PLC Program Validation through Time Petri Nets

International audienceLadder Diagram (LD) is the most used programming language for Programmable Logical Controllers (PLCs). A PLC is a special purpose industrial computer used to automate industrial processes. Bugs in LD programs are very costly and sometimes are even a threat to human safety. We propose a model driven approach for formal verification of LD programs through model-checking. We provide a metamodel for a subset of the LD language. We define a time Petri net (TPN) semantics for LD programs through an ATL model transformation. Finally, we automatically generate behavioral properties over the LD models as LTL formulae which are then checked over the generated TPN using the model-checkers available in the Tina toolkit. We focus on race condition detection. This work is supported by the topcased project, part of the french cluster Aerospace Valley (granted by the french DGE), cf. http://www.topcased.or

Modeling and Analysis of Stage Machinery Control Systems by Timed Colored Petri Nets

International audienceThis paper presents an approach and successful experience of applying timed colored Petri nets on modeling and analyzing a stage machinery control system. The programmable logic controllers (PLCs) based system is modeled with timing constraints. The compositionality is incorporated in the modeling process of the entire design. The PLC synchronization problem with the interactions of environment is analyzed by the state space analysis method. The case studies demonstrate the effectiveness of the approach

Towards Quantifying Programmable Logic Controller Resilience Against Intentional Exploits

Supervisory Control and Data Acquisition (SCADA) systems control and monitor services for the nation\u27s critical infrastructure. Recent cyber induced events (e.g., Stuxnet) provide an example of a targeted, covert cyber attack against a SCADA system that resulted in physical effects. Of particular note is how Stuxnet exploited the trust relationship between the human machine interface (HMI) and programmable logic controllers (PLCs). Current methods for validating system operating parameters rely on message exchange and network communications protocols, generally observed at the HMI. Although sufficient at the macro level, this method does not provide detection of malware that exhibits physical effects via covert manipulation of the PLC, as demonstrated by Stuxnet. In this research, an alternative method that leverages direct analysis of PLC input and output to derive the true state of SCADA end-devices is introduced. The behavioral input-output characteristics are modeled using Petri nets to derive metrics for quantifying resilient properties of systems against malicious exploits. The results yield metrics that are applicable towards quantifying resilience in PLCs and implementing real-time security solutions. These findings enable detecting programming changes that affect input and output relationships, identifying the degree of deviation from a baseline program, and minimizing performance losses against disruptive events

MECHATRONICS DESIGN FROM ZERO TO ONE (STRUCTURED LOGIC DESIGN TO PROGRAM LOGIC OF LADDER DIAGRAM FOR PLC)

The purpose of this work is to study and analyze the methods use to design logic of ladder diagram for PLC-based controller in automated manufacturing systems. Previous method employed to design the logic of ladder diagram does not show clearly on how it is done step by step, widely based on the programmer's experience and their intuition. The methods proposed namely method A and method G hopefully can help the programmer especially the new programmer to design the ladder logic systematically and efficiently while at the same time reduce the time consume to program it. This systematic logic design can help the programmer to trace back their program for debug purpose. A step by step instruction is provided in this paper for both method A and method G. Few basic sequence are tested Finally, a case study on packaging process is provided to illustrate the design procedure of the proposed methods. In the same time, author will also explore the capability of the Automation Studio software