Selective Epitaxy of Group IV Materials for CMOS Application

As the International Technology Roadmap for Semiconductors (ITRS) demands an increase of transistor density in the chip, the size of transistors has been continuously shrunk. In this evolution of transistor structure, different strain engineering methods were introduced to induce strain in the channel region. One of the most effective methods is applying embedded SiGe as stressor material in source and drain (S/D) regions by using selective epitaxy. This chapter presents an overview of implementation, modeling, and pattern dependency of selective epitaxy for S/D application in CMOS. The focus is also on the wafer in and ex situ cleaning prior to epitaxy, integrity of gate, and selectivity mode

Silicon on Nothing Mems Electromechanical Resonator

The very significant growth of the wireless communication industry has spawned tremendous interest in the development of high performances radio frequencies (RF) components. Micro Electro Mechanical Systems (MEMS) are good candidates to allow reconfigurable RF functions such as filters, oscillators or antennas. This paper will focus on the MEMS electromechanical resonators which show interesting performances to replace SAW filters or quartz reference oscillators, allowing smaller integrated functions with lower power consumption. The resonant frequency depends on the material properties, such as Young's modulus and density, and on the movable mechanical structure dimensions (beam length defined by photolithography). Thus, it is possible to obtain multi frequencies resonators on a wafer. The resonator performance (frequency, quality factor) strongly depends on the environment, like moisture or pressure, which imply the need for a vacuum package. This paper will present first resonator mechanisms and mechanical behaviors followed by state of the art descriptions with applications and specifications overview. Then MEMS resonator developments at STMicroelectronics including FEM analysis, technological developments and characterization are detailed.Comment: Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/EDA-Publishing

Multi-Gigabit Wireless data transfer at 60 GHz

In this paper we describe the status of the first prototype of the 60 GHz wireless Multi-gigabit data transfer topology currently under development at University of Heidelberg using IBM 130 nm SiGe HBT BiCMOS technology. The 60 GHz band is very suitable for high data rate and short distance applications as for example needed in the HEP experments. The wireless transceiver consist of a transmitter and a receiver. The transmitter includes an On-Off Keying (OOK) modulator, an Local Oscillator (LO), a Power Amplifier (PA) and a BandPass Filter (BPF). The receiver part is composed of a BandPass- Filter (BPF), a Low Noise Amplifier (LNA), a double balanced down-convert Gilbert mixer, a Local Oscillator (LO), then a BPF to remove the mixer introduced noise, an Intermediate Amplifier (IF), an On-Off Keying demodulator and a limiting amplifier. The first prototype would be able to handle a data-rate of about 3.5 Gbps over a link distance of 1 m. The first simulations of the LNA show that a Noise Figure (NF) of 5 dB, a power gain of 21 dB at 60 GHz with a 3 dB bandwidth of more than 20 GHz with a power consumption 11 mW are achieved. Simulations of the PA show an output referred compression point P1dB of 19.7 dB at 60 GHz.Comment: Proceedings of the WIT201

Silicon-germanium BiCMOS device and circuit design for extreme environment applications

Silicon-germanium (SiGe) BiCMOS technology platforms have proven invaluable for implementing a wide variety of digital, RF, and mixed-signal applications in extreme environments such as space, where maintaining high levels of performance in the presence of low temperatures and background radiation is paramount. This work will focus on the investigation of the total-dose radiation tolerance of a third generation complementary SiGe:C BiCMOS technology platform. Tolerance will be quantified under proton and X-ray radiation sources for both the npn and pnp HBT, as well as for an operational amplifier built with these devices. Furthermore, a technique known as junction isolation radiation hardening will be proposed and tested with the goal of improving the SEE sensitivity of the npn in this platform by reducing the charge collected by the subcollector in the event of a direct ion strike. To the author's knowledge, this work presents the first design and measurement results for this form of RHBD.M.S.Committee Chair: Cressler, John; Committee Member: Papapolymerou, John; Committee Member: Ralph, Stephe

Mask Programmable CMOS Transistor Arrays for Wideband RF Integrated Circuits

A mask programmable technology to implement RF and microwave integrated circuits using an array of standard 90-nm CMOS transistors is presented. Using this technology, three wideband amplifiers with more than 15-dB forward transmission gain operating in different frequency bands inside a 4-22-GHz range are implemented. The amplifiers achieve high gain-bandwidth products (79-96 GHz) despite their standard multistage designs. These amplifiers are based on an identical transistor array interconnected with application specific coplanar waveguide (CPW) transmission lines and on-chip capacitors and resistors. CPW lines are implemented using a one-metal-layer post-processing technology over a thick Parylene-N (15 mum ) dielectric layer that enables very low loss lines (~0.6 dB/mm at 20 GHz) and high-performance CMOS amplifiers. The proposed integration approach has the potential for implementing cost-efficient and high-performance RF and microwave circuits with a short turnaround time

Efficient and realistic device modeling from atomic detail to the nanoscale

As semiconductor devices scale to new dimensions, the materials and designs become more dependent on atomic details. NEMO5 is a nanoelectronics modeling package designed for comprehending the critical multi-scale, multi-physics phenomena through efficient computational approaches and quantitatively modeling new generations of nanoelectronic devices as well as predicting novel device architectures and phenomena. This article seeks to provide updates on the current status of the tool and new functionality, including advances in quantum transport simulations and with materials such as metals, topological insulators, and piezoelectrics.Comment: 10 pages, 12 figure

Through-Silicon Vias in SiGe BiCMOS and Interposer Technologies for Sub-THz Applications

Im Rahmen der vorliegenden Dissertation zum Thema „Through-Silicon Vias in SiGe BiCMOS and Interposer Technologies for Sub-THz Applications“ wurde auf Basis einer 130 nm SiGe BiCMOS Technologie ein Through-Silicon Via (TSV) Technologiemodul zur Herstellung elektrischer Durchkontaktierungen für die Anwendung im Millimeterwellen und Sub-THz Frequenzbereich entwickelt. TSVs wurden mittels elektromagnetischer Simulationen modelliert und in Bezug auf ihre elektrischen Eigenschaften bis in den sub-THz Bereich bis zu 300 GHz optimiert. Es wurden die Wechselwirkungen zwischen Modellierung, Fertigungstechnologie und den elektrischen Eigenschaften untersucht. Besonderes Augenmerk wurde auf die technologischen Einflussfaktoren gelegt. Daraus schlussfolgernd wurde das TSV Technologiemodul entwickelt und in eine SiGe BiCMOS Technologie integriert. Hierzu wurde eine Via-Middle Integration gewählt, welche eine Freilegung der TSVs von der Wafer Rückseite erfordert. Durch die geringe Waferdicke von ca. 75 μm wird einen Carrier Wafer Handling Prozess verwendet. Dieser Prozess wurde unter der Randbedingung entwickelt, dass eine nachfolgende Bearbeitung der Wafer innerhalb der BiCMOS Pilotlinie erfolgen kann. Die Rückseitenbearbeitung zielt darauf ab, einen Redistribution Layer auf der Rückseite der BiCMOS Wafer zu realisieren. Hierzu wurde ein Prozess entwickelt, um gleichzeitig verschiedene TSV Strukturen mit variablen Geometrien zu realisieren und damit eine hohe TSV Design Flexibilität zu gewährleisten. Die TSV Strukturen wurden von DC bis über 300 GHz charakterisiert und die elektrischen Eigenschaften extrahiert. Dabei wurde gezeigt, dass TSV Verbindungen mit sehr geringer Dämpfung <1 dB bis 300 GHz realisierbar sind und somit ausgezeichnete Hochfrequenzeigenschaften aufweisen. Zuletzt wurden vielfältige Anwendungen wie das Grounding von Hochfrequenzschaltkreisen, Interposer mit Waveguides und 300 GHz Antennen dargestellt. Das Potential für Millimeterwellen Packaging und 3D Integration wurde evaluiert. TSV Technologien sind heutzutage in vielen Anwendungen z.B. im Bereich der Systemintegration von Digitalschaltkreisen und der Spannungsversorgung von integrierten Schaltkreisen etabliert. Im Rahmen dieser Arbeit wurde der Einsatz von TSVs für Millimeterwellen und dem sub-THz Frequenzbereich untersucht und die Anwendung für den sub-THz Bereich bis 300 GHz demonstriert. Dadurch werden neue Möglichkeiten der Systemintegration und des Packaging von Höchstfrequenzsystemen geschaffen.:Bibliographische Beschreibung List of symbols and abbreviations Acknowledgement 1. Introduction 2. FEM Modeling of BiCMOS & Interposer Through-Silicon Vias 3. Fabrication of BiCMOS & Silicon Interposer with TSVs 4. Characterization of BiCMOS Embedded Through-Silicon Vias 5. Applications 6. Conclusion and Future Work 7. Appendix 8. Publications & Patents 9. Bibliography 10. List of Figures and Table

The NASA CSTI high capacity power project

The SP-100 Space Nuclear Power Program was established in 1983 by DOD, DOE, and NASA as a joint program to develop technology for military and civil applications. Starting in 1986, NASA has funded a technology program to maintain the momentum of promising aerospace technology advancement started during Phase 1 of SP-100 and to strengthen, in key areas, the chances for successful development and growth capability of space nuclear reactor power systems for a wide range of future space applications. The elements of the Civilian Space Technology Initiative (CSTI) High Capacity Power Project include Systems Analysis, Stirling Power Conversion, Thermoelectric Power Conversion, Thermal Management, Power Management, Systems Diagnostics, Environmental Interactions, and Material/Structural Development. Technology advancement in all elements is required to provide the growth capability, high reliability and 7 to 10 year lifetime demanded for future space nuclear power systems. The overall project will develop and demonstrate the technology base required to provide a wide range of modular power systems compatible with the SP-100 reactor which facilitates operation during lunar and planetary day/night cycles as well as allowing spacecraft operation at any attitude or distance from the sun. Significant accomplishments in all of the project elements will be presented, along with revised goals and project timelines recently developed