To overcome the scalability limitation of passive optical interconnects in datacentres

We propose to add optical amplifier(s) to passive optical interconnect (POI) at top-of-rack in datacentres and validate this approach by introducing impairment constraints into POIs design. It is shown that one amplifier can improve scalability by a factor of 16

Applications of satellite technology to broadband ISDN networks

Two satellite architectures for delivering broadband integrated services digital network (B-ISDN) service are evaluated. The first is assumed integral to an existing terrestrial network, and provides complementary services such as interconnects to remote nodes as well as high-rate multicast and broadcast service. The interconnects are at a 155 Mbs rate and are shown as being met with a nonregenerative multibeam satellite having 10-1.5 degree spots. The second satellite architecture focuses on providing private B-ISDN networks as well as acting as a gateway to the public network. This is conceived as being provided by a regenerative multibeam satellite with on-board ATM (asynchronous transfer mode) processing payload. With up to 800 Mbs offered, higher satellite EIRP is required. This is accomplished with 12-0.4 degree hopping beams, covering a total of 110 dwell positions. It is estimated the space segment capital cost for architecture one would be about $190M whereas the second architecture would be about$250M. The net user cost is given for a variety of scenarios, but the cost for 155 Mbs services is shown to be about $15-22/minute for 25 percent system utilization

Optical Switching for Scalable Data Centre Networks

This thesis explores the use of wavelength tuneable transmitters and control systems within the context of scalable, optically switched data centre networks. Modern data centres require innovative networking solutions to meet their growing power, bandwidth, and scalability requirements. Wavelength routed optical burst switching (WROBS) can meet these demands by applying agile wavelength tuneable transmitters at the edge of a passive network fabric. Through experimental investigation of an example WROBS network, the transmitter is shown to determine system performance, and must support ultra-fast switching as well as power efficient transmission. This thesis describes an intelligent optical transmitter capable of wideband sub-nanosecond wavelength switching and low-loss modulation. A regression optimiser is introduced that applies frequency-domain feedback to automatically enable fast tuneable laser reconfiguration. Through simulation and experiment, the optimised laser is shown to support 122×50 GHz channels, switching in less than 10 ns. The laser is deployed as a component within a new wavelength tuneable source (WTS) composed of two time-interleaved tuneable lasers and two semiconductor optical amplifiers. Switching over 6.05 THz is demonstrated, with stable switch times of 547 ps, a record result. The WTS scales well in terms of chip-space and bandwidth, constituting the first demonstration of scalable, sub-nanosecond optical switching. The power efficiency of the intelligent optical transmitter is further improved by introduction of a novel low-loss split-carrier modulator. The design is evaluated using 112 Gb/s/λ intensity modulated, direct-detection signals and a single-ended photodiode receiver. The split-carrier transmitter is shown to achieve hard decision forward error correction ready performance after 2 km of transmission using a laser output power of just 0 dBm; a 5.2 dB improvement over the conventional transmitter. The results achieved in the course of this research allow for ultra-fast, wideband, intelligent optical transmitters that can be applied in the design of all-optical data centres for power efficient, scalable networking

Optical Networks and Interconnects

The rapid evolution of communication technologies such as 5G and beyond, rely on optical networks to support the challenging and ambitious requirements that include both capacity and reliability. This chapter begins by giving an overview of the evolution of optical access networks, focusing on Passive Optical Networks (PONs). The development of the different PON standards and requirements aiming at longer reach, higher client count and delivered bandwidth are presented. PON virtualization is also introduced as the flexibility enabler. Triggered by the increase of bandwidth supported by access and aggregation network segments, core networks have also evolved, as presented in the second part of the chapter. Scaling the physical infrastructure requires high investment and hence, operators are considering alternatives to optimize the use of the existing capacity. This chapter introduces different planning problems such as Routing and Spectrum Assignment problems, placement problems for regenerators and wavelength converters, and how to offer resilience to different failures. An overview of control and management is also provided. Moreover, motivated by the increasing importance of data storage and data processing, this chapter also addresses different aspects of optical data center interconnects. Data centers have become critical infrastructure to operate any service. They are also forced to take advantage of optical technology in order to keep up with the growing capacity demand and power consumption. This chapter gives an overview of different optical data center network architectures as well as some expected directions to improve the resource utilization and increase the network capacity

Impact of physical layer impairments on large ROADM architectures

Most of today’s optical networks, use reconfigurable optical add/drop multiplexers (ROADMs) as nodes. To become more dynamic and flexible, these nodes architectures evolved over the years. The colorless, directionless and contentionless functionalities are now standard, however, current architectures have poor scalability due to limitations on wavelength selective switches dimensions. Hence, due to constant increase in data traffic, current architectures might become a bottleneck to manufacture future large-scale ROADMs. In this work, the hardware cost and in-band crosstalk generation inside different large-scale ROADM architectures, is compared with conventional architectures. Moreover, an analysis of optical filtering, amplified spontaneous emission (ASE) noise and in-band crosstalk impact in the performance of an optical network, with nodes based on the most promising large-scale architecture, the interconnected A architecture, is performed. This performance is assessed through Monte-Carlo simulation with 16 point quadrature amplitude modulation with polarization-division multiplexing (PDM-16QAM) and PDM- 32QAM signals with 200 Gb/s and 250 Gb/s, respectively. Two architectures are considered for the interconnected A express structure, Broadcast and Select (B&S) and Route and Select (R&S). For the add/drop structure, a bank-based structure is considered. The maximum number of cascaded ROADMs, considering all the studied impairments, is 5 and 7 nodes for a 32 GBaud 16QAM signal, respectively, for B&S and R&S architectures. A 32QAM signal reaches 3 and 4 nodes, respectively, for B&S and R&S architectures. The main penalty in transmission is the ASE noise generated by optical amplifiers throughout the network, having the in-band crosstalk and optical filtering penalties a lower contribution.A maioria das redes óticas são atualmente compostas por multiplexadores óticos de inserção/extração reconfiguráveis (ROADMs, em inglês) nos nós, cuja arquitetura tem evoluído para se tornarem mais dinâmicos e flexíveis. As funcionalidades colorless, directionless e contentionless estão hoje normalizadas, no entanto, as arquiteturas atuais tornam-se pouco escaláveis para ROADMs de elevada dimensão, devido a limitações nos comutadores seletivos no comprimento-de-onda. Neste trabalho, a comparação entre os custos associados e a geração de crosstalk homódino em diferentes arquiteturas propostas para ROADMs de elevada dimensão e as arquitecturas tradicionais é efetuada. É também analisado o impacto da filtragem ótica, ruído de emissão espontânea amplificada (ASE, em inglês) e crosstalk homódino no desempenho de uma rede com nós baseados na arquitetura denominada "Interconnected A". A avaliação é feita através de simulação Monte-Carlo com sinais multiplexados por divisão na polarização e modulação de amplitude em quadratura, PDM-16QAM e PDM-32QAM a 200 Gb/s e 250 Gb/s, respetivamente. Foram consideradas duas configurações para os ROADMs estudados, Broadcast and Select e Route and Select (B&S e R&S, em inglês) e uma estrutura de inserção/extração denominada "bank-based". Quando considerados todos os efeitos, o alcance máximo da rede é de 4 e 7 nós para um sinal 16QAM, respetivamente, para configurações B&S e R&S. Para um sinal 32QAM, é de 3 e 4 nós, respetivamente, para configurações B&S e R&S. A principal penalidade na transmissão deve-se ao ruído ASE gerado nos amplificadores óticos ao longo da rede, tendo a penalidade devido ao crosstalk homódino e a filtragem ótica uma menor contribuição

Silicon Photonic Subsystems for Inter-Chip Optical Networks

The continuous growth of electronic compute and memory nodes in terms of the number of I/O pins, bandwidth, and areal throughput poses major integration and packaging challenges associated with offloading multi-Tbit/s data rates within the few pJ/bit targets. While integrated photonics are already deployed in long and short distances such as inter and intra data centers communications, the promising characteristics of the silicon photonic platform set it as the future technology for optical interconnects in ultra short inter-chip distances. The high index contrast between the waveguide and the cladding together with strong thermo-optic and carrier effects in silicon allows developing a wide range of micro-scale and low power optical devices compatible with the CMOS fabrication processes. Furthermore, the availability of photonic foundries and new electrical and optical co-packaging techniques further pushes this platform for the next steps of commercial deployment. The work in this dissertation presents the current trends in high-performance memory and processor nodes and gives motivation for disaggregated and reconfigurable inter-chip network enabled with the silicon photonic layer. A dense WDM transceiver and broadband switch architectures are discussed to support a bi-directional network of ten hybrid-memory cubes (HMC) interconnected to ten processor nodes with an overall aggregated bandwidth of 9.6Tbit/s. Latency and energy consumption are key performance parameters in a processor to primary memory nodes connectivity. The transceiver design is based on energy-efficient micro-ring resonators, and the broadband switch is constructed with 2x2 Mach-Zehnder elements for nano-second reconfiguration. Each transceiver is based on hundreds of micro-rings to convert the native HMC electrical protocol to the optical domain and the switch is based on tens of hundreds of 2x2 elements to achieve non-blocking all-to-all connectivity. The next chapters focus on developing methods for controlling and monitoring such complex and highly integrated silicon photonic subsystems. The thermo-optic effect is characterized and we show experimentally that the phase of the optical carrier can be reliably controlled with pulse-width modulation (PWM) signal, ultimately relaxing the need for hundreds of digital to analog converters (DACs). We further show that doped waveguide heaters can be utilized as \textit{in-line} optical power monitors by measuring photo-conductance current, which is an alternative for the conventional tapping and integration of photo-diodes. The next part concerned with a common cascaded micro-ring resonator in a WDM transceiver design. We develop on an FPGA control algorithm that abstracts the physical layer and takes user-defined inputs to set the resonances to the desired wavelength in a unicast and multicast transmission modes. The associated sensitivities of these silicon ring resonators are presented and addressed with three closed-loop solutions. We first show a closed-loop operation based on tapping the error signal from the drop port of the micro-ring. The second solution presents a resonance wavelength locking with a single digital I/O for control and feedback signals. Lastly, we leverage the photo-conductance effect and demonstrate the locking procedure using only the doped heater for both control and feedback purposes. To achieve the inter-chip reconfigurability we discuss recent advances of high-port-count SiP broadband switches for reconfigurable inter-chip networks. To ensure optimal operation in terms of low insertion loss, low cross-talk and high signal integrity per routing path, hundreds of 2x2 Mach-Zehnder elements need to be biased precisely for the cross and bar states. We address this challenge with a tapless and a design agnostic calibration approach based on the photo-conductance effect. The automated algorithm returns a look-up table for all for each 2x2 element and the associated calibrated biases. Each routing scenario is then tested for insertion loss, crosstalk and bit-error rate of 25Gbit/s 4-level pulse amplitude modulation signals. The last part utilizes the Mach-Zehnder interferometers in WDM transceiver applications. We demonstrate a polarization insensitive four-channel WDM receiver with 40Gbit/s per channel and a transmitter design generating 8-level pulse amplitude modulation signals at 30Gbit/s

Application of advanced on-board processing concepts to future satellite communications systems

An initial definition of on-board processing requirements for an advanced satellite communications system to service domestic markets in the 1990's is presented. An exemplar system architecture with both RF on-board switching and demodulation/remodulation baseband processing was used to identify important issues related to system implementation, cost, and technology development

Engineer the channel and adapt to it: enabling wireless intra-chip communication

© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.The authors gratefully acknowledge support from the Spanish MINECO under grant PCIN-2015-012, from the EU’s H2020 FET-OPEN program under grants No. 736876 and No. 863337, and by the Catalan Institution for Research and Advanced Studies (ICREA).Peer ReviewedPostprint (author's final draft

Hybrid Optoelectronic Router for Future Optical Packet‐ Switched Networks

With the growing demand for bandwidth and the need to support new services, several challenges are awaiting future photonic networks. In particular, the performance of current network nodes dominated by electrical routers/switches is seen as a bottleneck that is accentuated by the pressing demand for reducing the network power consumption. With the concept of performing more node functions with optics/optoelectronics, optical packet switching (OPS) provides a promising solution. We have developed a hybrid optoelectronic router (HOPR) prototype that exhibits low power consumption and low latency together with high functionality. The router is enabled by key optical/optoelectronic devices and subsystem technologies that are combined with CMOS electronics in a novel architecture to leverage the strengths of both optics/optoelectronics and electronics. In this chapter, we review our recent HOPR prototype developed for realizing a new photonic intra data center (DC) network. After briefly explaining about the HOPR‐based DC network, we highlight the underlying technologies of the new prototype that enables label processing, switching, and buffering of asynchronous arbitrary‐length 100‐Gbps (25‐Gbps × 4λs) burst‐mode optical packets with enhanced power efficiency and reduced latency