3,408 research outputs found
Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions
In the past decade, Convolutional Neural Networks (CNNs) have demonstrated
state-of-the-art performance in various Artificial Intelligence tasks. To
accelerate the experimentation and development of CNNs, several software
frameworks have been released, primarily targeting power-hungry CPUs and GPUs.
In this context, reconfigurable hardware in the form of FPGAs constitutes a
potential alternative platform that can be integrated in the existing deep
learning ecosystem to provide a tunable balance between performance, power
consumption and programmability. In this paper, a survey of the existing
CNN-to-FPGA toolflows is presented, comprising a comparative study of their key
characteristics which include the supported applications, architectural
choices, design space exploration methods and achieved performance. Moreover,
major challenges and objectives introduced by the latest trends in CNN
algorithmic research are identified and presented. Finally, a uniform
evaluation methodology is proposed, aiming at the comprehensive, complete and
in-depth evaluation of CNN-to-FPGA toolflows.Comment: Accepted for publication at the ACM Computing Surveys (CSUR) journal,
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An area-efficient 2-D convolution implementation on FPGA for space applications
The 2-D Convolution is an algorithm widely used in image and video processing. Although its computation is simple, its implementation requires a high computational power and an intensive use of memory. Field Programmable Gate Arrays (FPGA) architectures were proposed to accelerate calculations of 2-D Convolution and the use of buffers implemented on FPGAs are used to avoid direct memory access. In this paper we present an implementation of the 2-D Convolution algorithm on a FPGA architecture designed to support this operation in space applications. This proposed solution dramatically decreases the area needed keeping good performance, making it appropriate for embedded systems in critical space application
Optimal load shedding for microgrids with unlimited DGs
Recent years, increasing trends on electrical supply demand, make us to search for
the new alternative in supplying the electrical power. A study in micro grid system
with embedded Distribution Generations (DGs) to the system is rapidly increasing.
Micro grid system basically is design either operate in islanding mode or
interconnect with the main grid system. In any condition, the system must have
reliable power supply and operating at low transmission power loss. During the
emergency state such as outages of power due to electrical or mechanical faults in
the system, it is important for the system to shed any load in order to maintain the
system stability and security. In order to reduce the transmission loss, it is very
important to calculate best size of the DGs as well as to find the best positions in
locating the DG itself.. Analytical Hierarchy Process (AHP) has been applied to find
and calculate the load shedding priorities based on decision alternatives which have
been made. The main objective of this project is to optimize the load shedding in the
micro grid system with unlimited DG’s by applied optimization technique
Gravitational Search Algorithm (GSA). The technique is used to optimize the
placement and sizing of DGs, as well as to optimal the load shedding. Several load
shedding schemes have been proposed and studied in this project such as load
shedding with fixed priority index, without priority index and with dynamic priority
index. The proposed technique was tested on the IEEE 69 Test Bus Distribution
system
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