1,536 research outputs found
LEGaTO: first steps towards energy-efficient toolset for heterogeneous computing
LEGaTO is a three-year EU H2020 project which started in December 2017. The LEGaTO project will leverage task-based programming models to provide a software ecosystem for Made-in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. The aim is to attain one order of magnitude energy savings from the edge to the converged cloud/HPC.Peer ReviewedPostprint (author's final draft
An FPGA smart camera implementation of segmentation models for drone wildfire imagery
Wildfires represent one of the most relevant natural disasters worldwide, due
to their impact on various societal and environmental levels. Thus, a
significant amount of research has been carried out to investigate and apply
computer vision techniques to address this problem. One of the most promising
approaches for wildfire fighting is the use of drones equipped with visible and
infrared cameras for the detection, monitoring, and fire spread assessment in a
remote manner but in close proximity to the affected areas. However,
implementing effective computer vision algorithms on board is often prohibitive
since deploying full-precision deep learning models running on GPU is not a
viable option, due to their high power consumption and the limited payload a
drone can handle. Thus, in this work, we posit that smart cameras, based on
low-power consumption field-programmable gate arrays (FPGAs), in tandem with
binarized neural networks (BNNs), represent a cost-effective alternative for
implementing onboard computing on the edge. Herein we present the
implementation of a segmentation model applied to the Corsican Fire Database.
We optimized an existing U-Net model for such a task and ported the model to an
edge device (a Xilinx Ultra96-v2 FPGA). By pruning and quantizing the original
model, we reduce the number of parameters by 90%. Furthermore, additional
optimizations enabled us to increase the throughput of the original model from
8 frames per second (FPS) to 33.63 FPS without loss in the segmentation
performance: our model obtained 0.912 in Matthews correlation coefficient
(MCC),0.915 in F1 score and 0.870 in Hafiane quality index (HAF), and
comparable qualitative segmentation results when contrasted to the original
full-precision model. The final model was integrated into a low-cost FPGA,
which was used to implement a neural network accelerator.Comment: This paper has been accepted at the 22nd Mexican International
Conference on Artificial Intelligence (MICAI 2023
Enabling Runtime Self-Coordination of Reconfigurable Embedded Smart Cameras in Distributed Networks
Smart camera networks are real-time distributed embedded systems able to perform computer vision using multiple cameras. This new approach is a confluence of four major disciplines (computer vision, image sensors, embedded computing and sensor networks) and has been subject of intensive work in the past decades. The recent advances in computer vision and network communication, and the rapid growing in the field of high-performance computing, especially using reconfigurable devices, have enabled the design of more robust smart camera systems. Despite these advancements, the effectiveness of current networked vision systems (compared to their operating costs) is still disappointing; the main reason being the poor coordination among cameras entities at runtime and the lack of a clear formalism to dynamically capture and address the self-organization problem without relying on human intervention. In this dissertation, we investigate the use of a declarative-based modeling approach for capturing runtime self-coordination. We combine modeling approaches borrowed from logic programming, computer vision techniques, and high-performance computing for the design of an autonomous and cooperative smart camera. We propose a compact modeling approach based on Answer Set Programming for architecture synthesis of a system-on-reconfigurable-chip camera that is able to support the runtime cooperative work and collaboration with other camera nodes in a distributed network setup. Additionally, we propose a declarative approach for modeling runtime camera self-coordination for distributed object tracking in which moving targets are handed over in a distributed manner and recovered in case of node failure
Efficient Smart CMOS Camera Based on FPGAs Oriented to Embedded Image Processing
This article describes an image processing system based on an intelligent ad-hoc camera, whose two principle elements are a high speed 1.2 megapixel Complementary Metal Oxide Semiconductor (CMOS) sensor and a Field Programmable Gate Array (FPGA). The latter is used to control the various sensor parameter configurations and, where desired, to receive and process the images captured by the CMOS sensor. The flexibility and versatility offered by the new FPGA families makes it possible to incorporate microprocessors into these reconfigurable devices, and these are normally used for highly sequential tasks unsuitable for parallelization in hardware. For the present study, we used a Xilinx XC4VFX12 FPGA, which contains an internal Power PC (PPC) microprocessor. In turn, this contains a standalone system which manages the FPGA image processing hardware and endows the system with multiple software options for processing the images captured by the CMOS sensor. The system also incorporates an Ethernet channel for sending processed and unprocessed images from the FPGA to a remote node. Consequently, it is possible to visualize and configure system operation and captured and/or processed images remotely
Performance and energy-efficient implementation of a smart city application on FPGAs
The continuous growth of modern cities and the request for better quality of life, coupled with the increased availability of computing resources, lead to an increased attention to smart city services. Smart cities promise to deliver a better life to their inhabitants while simultaneously reducing resource requirements and pollution. They are thus perceived as a key enabler to sustainable growth. Out of many other issues, one of the major concerns for most cities in the world is traffic, which leads to a huge waste of time and energy, and to increased pollution. To optimize traffic in cities, one of the first steps is to get accurate information in real time about the traffic flows in the city. This can be achieved through the application of automated video analytics to the video streams provided by a set of cameras distributed throughout the city. Image sequence processing can be performed both peripherally and centrally. In this paper, we argue that, since centralized processing has several advantages in terms of availability, maintainability and cost, it is a very promising strategy to enable effective traffic management even in large cities. However, the computational costs are enormous, and thus require an energy-efficient High-Performance Computing approach. Field Programmable Gate Arrays (FPGAs) provide comparable computational resources to CPUs and GPUs, yet require much lower amounts of energy per operation (around 6 and 10 for the application considered in this case study). They are thus preferred resources to reduce both energy supply and cooling costs in the huge datacenters that will be needed by Smart Cities. In this paper, we describe efficient implementations of high-performance algorithms that can process traffic camera image sequences to provide traffic flow information in real-time at a low energy and power cost
Performance Optimization of Memory Intensive Applications on FPGA Accelerator
L'abstract è presente nell'allegato / the abstract is in the attachmen
VAMP - a vision based sensor network for health care hygiene
Adequate hand-washing has been shown to be a critical activity in preventing the transmission of infections such as MRSA in health-care environments. Hand-washing guidelines published by various health-care related institutions recommend a technique incorporating six hand-washing poses that ensure all areas of the hands are thoroughly cleaned. In this paper, an embedded wireless vision system (VAMP) capable of accurately monitoring hand-washing quality is presented. The VAMP system hardware consists of a low resolution CMOS image sensor and FPGA processor which are integrated with a microcontroller and ZigBee standard wireless transceiver to create a wireless sensor network (WSN) based vision system that can be retargeted at a variety of health care applications. The device captures and processes images locally in real-time, determines if hand-washing procedures have been correctly undertaken and then passes the resulting high-level data over a low-bandwidth wireless link. The paper outlines the hardware and software mechanisms of the VAMP system and illustrates that it offers an easy to integrate sensor solution to adequately monitor and improve hand hygiene quality. Future work to develop a miniaturized, low cost system capable of being integrated into everyday products is also discussed
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