5,114 research outputs found
High-Efficient Parallel CAVLC Encoders on Heterogeneous Multicore Architectures
This article presents two high-efficient parallel realizations of the context-based adaptive variable length coding (CAVLC) based on heterogeneous multicore processors. By optimizing the architecture of the CAVLC encoder, three kinds of dependences are eliminated or weaken, including the context-based data dependence, the memory accessing dependence and the control dependence. The CAVLC pipeline is divided into three stages: two scans, coding, and lag packing, and be implemented on two typical heterogeneous multicore architectures. One is a block-based SIMD parallel CAVLC encoder on multicore stream processor STORM. The other is a component-oriented SIMT parallel encoder on massively parallel architecture GPU. Both of them exploited rich data-level parallelism. Experiments results show that compared with the CPU version, more than 70 times of speedup can be obtained for STORM and over 50 times for GPU. The implementation of encoder on STORM can make a real-time processing for 1080p @30fps and GPU-based version can satisfy the requirements for 720p real-time encoding. The throughput of the presented CAVLC encoders is more than 10 times higher than that of published software encoders on DSP and multicore platforms
Distributed-Memory Breadth-First Search on Massive Graphs
This chapter studies the problem of traversing large graphs using the
breadth-first search order on distributed-memory supercomputers. We consider
both the traditional level-synchronous top-down algorithm as well as the
recently discovered direction optimizing algorithm. We analyze the performance
and scalability trade-offs in using different local data structures such as CSR
and DCSC, enabling in-node multithreading, and graph decompositions such as 1D
and 2D decomposition.Comment: arXiv admin note: text overlap with arXiv:1104.451
String Matching with Multicore CPUs: Performing Better with the Aho-Corasick Algorithm
Multiple string matching is known as locating all the occurrences of a given
number of patterns in an arbitrary string. It is used in bio-computing
applications where the algorithms are commonly used for retrieval of
information such as sequence analysis and gene/protein identification.
Extremely large amount of data in the form of strings has to be processed in
such bio-computing applications. Therefore, improving the performance of
multiple string matching algorithms is always desirable. Multicore
architectures are capable of providing better performance by parallelizing the
multiple string matching algorithms. The Aho-Corasick algorithm is the one that
is commonly used in exact multiple string matching algorithms. The focus of
this paper is the acceleration of Aho-Corasick algorithm through a multicore
CPU based software implementation. Through our implementation and evaluation of
results, we prove that our method performs better compared to the state of the
art
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