18 research outputs found

    Merged Search Algorithms for Radio Frequency Identification Anticollision

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    Nowadays, the Radio Frequency Identification (RFID) system enables the control of many devices over an open communication infrastructure ranging from a small home area network to the global Internet. Moreover, a variety of consumer products are tagged with remotely low-cost readable identification electromagnetic tags to replace Bar Codes. Applications such as automatic object tracking, inventory and supply chain management, and Web appliances were adopted for years in many companies. The arbitration algorithm for RFID system is used to arbitrate all the tags to avoid the collision problem with the existence of multiple tags in the interrogation field of a transponder. A splitting algorithm which is called Binary Search Tree (BST) is well known for multitags arbitration. In the current study, a splitting-based schema called Merged Search Tree is proposed to capture identification codes correctly for anticollision. Performance of the proposed algorithm is compared with the original BST according to time and power consumed during the arbitration process. The results show that the proposed model can reduce searching time and power consumed to achieve a better performance arbitration

    Probabilistic DCS: An RFID reader-to-reader anti-collision protocol

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    The wide adoption of radio frequency identification (RFID) for applications requiring a large number of tags and readers makes critical the reader-to-reader collision problem. Various anti-collision protocols have been proposed, but the majority require considerable additional resources and costs. Distributed color system (DCS) is a state-of-the-art protocol based on time division, without noteworthy additional requirements. This paper presents the probabilistic DCS (PDCS) reader-to-reader anti-collision protocol which employs probabilistic collision resolution. Differently from previous time division protocols, PDCS allows multichannel transmissions, according to international RFID regulations. A theoretical analysis is provided in order to clearly identify the behavior of the additional parameter representing the probability. The proposed protocol maintains the features of DCS, achieving more efficiency. Theoretical analysis demonstrates that the number of reader-to-reader collisions after a slot change is decreased by over 30%. The simulation analysis validates the theoretical results, and shows that PDCS reaches better performance than state-of-the-art reader-to-reader anti-collision protocol

    Advanced Radio Frequency Identification Design and Applications

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    Radio Frequency Identification (RFID) is a modern wireless data transmission and reception technique for applications including automatic identification, asset tracking and security surveillance. This book focuses on the advances in RFID tag antenna and ASIC design, novel chipless RFID tag design, security protocol enhancements along with some novel applications of RFID

    DESIGN AUTOMATION FOR LOW POWER RFID TAGS

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    Radio Frequency Identification (RFID) tags are small, wireless devices capable of automated item identification, used in a variety of applications including supply chain management, asset management, automatic toll collection (EZ Pass), etc. However, the design of these types of custom systems using the traditional methods can take months for a hardware engineer to develop and debug. In this dissertation, an automated, low-power flow for the design of RFID tags has been developed, implemented and validated. This dissertation presents the RFID Compiler, which permits high-level design entry using a simple description of the desired primitives and their behavior in ANSI-C. The compiler has different back-ends capable of targeting microprocessor-based or custom hardware-based tags. For the hardware-based tag, the back-end automatically converts the user-supplied behavior in C to low power synthesizable VHDL optimized for RFID applications. The compiler also integrates a fast, high-level power macromodeling flow, which can be used to generate power estimates within 15% accuracy of industry CAD tools and to optimize the primitives and / or the behaviors, compared to conventional practices. Using the RFID Compiler, the user can develop the entire design in a matter of days or weeks. The compiler has been used to implement standards such as ANSI, ISO 18000-7, 18000-6C and 18185-7. The automatically generated tag designs were validated by targeting microprocessors such as the AD Chips EISC and FPGAs such as Xilinx Spartan 3. The corresponding ASIC implementation is comparable to the conventionally designed commercial tags in terms of the energy and area. Thus, the RFID Compiler permits the design of power efficient, custom RFID tags by a wider audience with a dramatically reduced design cycle

    On the design and implementation of efficient antennas for high frequency-radio frequency identification read/write devices

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    AbstractThis article describes an in‐depth methodical approach to the development of efficient high‐frequency (HF) antennas for use in radio frequency identification (RFID) systems operating at 13.56 MHz. It presents brief theory relevant to RFID communication and sets up a framework within which features and requirements of antennas are linked to key design parameters such as antenna form‐factor and size; RF power level, material and communication protocol. Tuning circuits necessary to adjust the resonance and power matching characteristics of antennas for good transponder interrogation and response recovery are discussed. To validate the approaches outlined, a stepwise design and measurement of an HF antenna for an ISO/IEC 15693 compliant read/write device (RWD) is described. Common practical problems that are often encountered in such design processes are also commented on. The prototyped antenna was tuned, connected to the RWD via a 50 coaxial cable and tested

    Energy efficiency in short and wide-area IoT technologies—A survey

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    In the last years, the Internet of Things (IoT) has emerged as a key application context in the design and evolution of technologies in the transition toward a 5G ecosystem. More and more IoT technologies have entered the market and represent important enablers in the deployment of networks of interconnected devices. As network and spatial device densities grow, energy efficiency and consumption are becoming an important aspect in analyzing the performance and suitability of different technologies. In this framework, this survey presents an extensive review of IoT technologies, including both Low-Power Short-Area Networks (LPSANs) and Low-Power Wide-Area Networks (LPWANs), from the perspective of energy efficiency and power consumption. Existing consumption models and energy efficiency mechanisms are categorized, analyzed and discussed, in order to highlight the main trends proposed in literature and standards toward achieving energy-efficient IoT networks. Current limitations and open challenges are also discussed, aiming at highlighting new possible research directions

    Collision Resolution in ISO 18000-6C Passive RFID Communication

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    According to the ISO 18000-6C passive RFID standard, the tags rely on limited energy harvested from the reader carrier wave rather than an internal power supply to perform logic functions and backscatter signals. The reader receives the tag's backscattered response, and then decodes the tag signal in order to access the tag information. However, in a tag intensive environment, when multiple tags receive the reader Query command and respond simultaneously, the reader may receive multiple responses giving what is termed a collision signal. Because the collision signal violates the encoding as specified in the standard, the reader is not able to decode it using its built-in circuitry that is designed for non-colliding tag responses. Therefore, the reader fails to complete the inventory for tags in the field in this case, which degrades the overall performance of the passive RFID system requiring retries.This research focuses on resolving the two-tag collision signal with extensions to more tags. A preliminary tag data acquisition system has been developed along with an ISO 18000-6C conformance test platform, which consists of an FPGA-based software defined reader. The collision signal is obtained from the data acquisition system and processed by the FPGA in real time. Two types of collision resolving algorithms based on phase and amplitude characteristics of the collision signal are developed and simulated using LabVIEW on a host PC and then realized with a National Instruments FPGA development board NI5640R. These two algorithms deal with the two-tag collision situation with and without a distinct phase shift individually, and they can be unified. As an extension to multiple tag collision resolution, an advanced statistical signal processing method using Independent Component Analysis (ICA) is researched for the three-tag collision situation. The ICA simulation is performed using LabVIEW on the host PC, and then implemented on the target FPGA development board. Performance analysis and comparison are presented to prove the efficiency and timing conformance of the proposed methods to the standard. Finally, the collision signals acquired from moving tags are resolved using the amplitude mapping method to prove the method compatibility on dynamic tags
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