Circuit design and analysis for on-FPGA communication systems

On-chip communication system has emerged as a prominently important subject in Very-Large- Scale-Integration (VLSI) design, as the trend of technology scaling favours logics more than interconnects. Interconnects often dictates the system performance, and, therefore, research for new methodologies and system architectures that deliver high-performance communication services across the chip is mandatory. The interconnect challenge is exacerbated in Field-Programmable Gate Array (FPGA), as a type of ASIC where the hardware can be programmed post-fabrication. Communication across an FPGA will be deteriorating as a result of interconnect scaling. The programmable fabrics, switches and the specific routing architecture also introduce additional latency and bandwidth degradation further hindering intra-chip communication performance. Past research efforts mainly focused on optimizing logic elements and functional units in FPGAs. Communication with programmable interconnect received little attention and is inadequately understood. This thesis is among the first to research on-chip communication systems that are built on top of programmable fabrics and proposes methodologies to maximize the interconnect throughput performance. There are three major contributions in this thesis: (i) an analysis of on-chip interconnect fringing, which degrades the bandwidth of communication channels due to routing congestions in reconfigurable architectures; (ii) a new analogue wave signalling scheme that significantly improves the interconnect throughput by exploiting the fundamental electrical characteristics of the reconfigurable interconnect structures. This new scheme can potentially mitigate the interconnect scaling challenges. (iii) a novel Dynamic Programming (DP)-network to provide adaptive routing in network-on-chip (NoC) systems. The DP-network architecture performs runtime optimization for route planning and dynamic routing which, effectively utilizes the in-silicon bandwidth. This thesis explores a new horizon in reconfigurable system design, in which new methodologies and concepts are proposed to enhance the on-FPGA communication throughput performance that is of vital importance in new technology processes

Behavioral synthesis from VHDL using structured modeling

This dissertation describes work in behavioral synthesis involving the development of a VHDL Synthesis System VSS which accepts a VHDL behavioral input specification and performs technology independent synthesis to generate a circuit netlist of generic components. The VHDL language is used for input and output descriptions. An intermediate representation which incorporates signal typing and component attributes simplifies compilation and facilitates design optimization.A Structured Modeling methodology has been developed to suggest standard VHDL modeling practices for synthesis. Structured modeling provides recommendations for the use of available VHDL description styles so that optimal designs will be synthesized.A design composed of generic components is synthesized from the input description through a process of Graph Compilation, Graph Criticism, and Design Compilation. Experiments were performed to demonstrate the effects of different modeling styles on the quality of the design produced by VSS. Several alternative VHDL models were examined for each benchmark, illustrating the improvements in design quality achieved when Structured Modeling guidelines were followed

Utilizing Converter-Interfaced Sources for Frequency Control with Guaranteed Performance in Power Systems

To integrate renewable energy, converter-interfaced sources (CISs) keep penetrating into power systems and degrade the grid frequency response. Control synthesis towards guaranteed performance is a challenging task. Meanwhile, the potentials of highly controllable converters are far from fully developed. With properly designed controllers the CISs can not only eliminate the negative impacts on the grid, but also provide performance guarantees.First, the wind turbine generator (WTG) is chosen to represent the CISs. An augmented system frequency response (ASFR) model is derived, including the system frequency response model and a reduced-order model of the WTG representing the supportive active power due to the supplementary inputs.Second, the framework for safety verification is introduced. A new concept, region of safety (ROS), is proposed, and the safe switching principle is provided. Two different approaches are proposed to estimate the largest ROS, which can be solved using the sum of squares programming.Third, the critical switching instants for adequate frequency response are obtained through the study of the ASFR model. A safe switching window is discovered, and a safe speed recovery strategy is proposed to ensure the safety of the second frequency dip due to the WTG speed recovery.Fourth, an adaptive safety supervisory control (SSC) is proposed with a two-loop configuration, where the supervisor is scheduled with respect to the varying renewable penetration level. For small-scale system, a decentralized fashion of the SSC is proposed under rational approximations and verified on the IEEE 39-bus system.Fifth, a two-level control diagram is proposed so that the frequency of a microgrid satisfies the temporal logic specifications (TLSs). The controller is configured into a scheduling level and a triggering level. The satisfaction of TLSs will be guaranteed by the scheduling level, and triggering level will determine the activation instant.Finally, a novel model reference control based synthetic inertia emulation strategy is proposed. This novel control strategy ensures precise emulated inertia by the WTGs as opposed to the trial and error procedure of conventional methods. Safety bounds can be easily derived based on the reference model under the worst-case scenario

Efficient Control Approaches for Guaranteed Frequency Performance in Power Systems

Due to high penetration of renewable energy, converter-interfaced sources are increasing in power systems and degrading the grid frequency response. Synthetic inertia emulation and guaranteed primary frequency response is a challenging task. Still, there is high potential for application of highly controllable converter-interfaced devices to help performance. Renewable energy sources and demand side smart devices also need to be equipped with innovative frequency control approaches that contribute to frequency regulation operations. First, the wind turbine generator is chosen to represent an example of a converter- interfaced source. An augmented system frequency response model is derived, including the system frequency response model and a reduced-order model of the wind turbine generator representing the supportive active power due to supplementary inputs. An output feedback observer-based control is designed to provide guaranteed frequency performance. System performance is analyzed for different short circuit ratio scenarios where a lower bound to guarantee the performance is obtained. Second, the load side control for frequency regulation with its challenges is introduced. 5G technology and its potential application in smart grids are analyzed. The effect of communication delays and packet losses on inertia emulation are investigated to show the need of using improved communication infrastructure. Third, a robust delay compensation for primary frequency control using fast demand response is proposed. Possible system structured uncertainties and communication delays are considered to limit frequency variations using the proposed control approach. An uncertain governor dead-band model is introduced to capture frequency response characteristics. Guaranteed inertial response is achieved and compared with a PI-based Smith predictor controller to show the effectiveness of the proposed method. Fourth, set theoretic methods for safety verification to provide guaranteed frequency response are introduced. The Barrier certificate approach using a linear programming relaxation by Handelman’s representation is proposed with its application to power systems. Finally, the Handelman’s based barrier certificate approach for adequate frequency performance is studied. The computational algorithm is provided for the proposed method and validated using power system benchmark case studies with a discussion on a safety supervisory control (SSC)

Virtual Machine Support for Many-Core Architectures: Decoupling Abstract from Concrete Concurrency Models

The upcoming many-core architectures require software developers to exploit concurrency to utilize available computational power. Today's high-level language virtual machines (VMs), which are a cornerstone of software development, do not provide sufficient abstraction for concurrency concepts. We analyze concrete and abstract concurrency models and identify the challenges they impose for VMs. To provide sufficient concurrency support in VMs, we propose to integrate concurrency operations into VM instruction sets. Since there will always be VMs optimized for special purposes, our goal is to develop a methodology to design instruction sets with concurrency support. Therefore, we also propose a list of trade-offs that have to be investigated to advise the design of such instruction sets. As a first experiment, we implemented one instruction set extension for shared memory and one for non-shared memory concurrency. From our experimental results, we derived a list of requirements for a full-grown experimental environment for further research

Run-time Spatial Mapping of Streaming Applications to Heterogeneous Multi-Processor Systems

In this paper, we define the problem of spatial mapping. We present reasons why performing spatial mappings at run-time is both necessary and desirable. We propose what is—to our knowledge—the first attempt at a formal description of spatial mappings for the embedded real-time streaming application domain. Thereby, we introduce criteria for a qualitative comparison of these spatial mappings. As an illustration of how our formalization relates to practice, we relate our own spatial mapping algorithm to the formal model

A Wide Area Hierarchical Voltage Control for Systems with High Wind Penetration and an HVDC Overlay

The modern power grid is undergoing a dramatic revolution. On the generation side, renewable resources are replacing fossil fuel in powering the system. On the transmission side, an AC-DC hybrid network has become increasingly popular to help reduce the transportation cost of electricity. Wind power, as one of the environmental friendly renewable resources, has taken a larger and larger share of the generation market. Due to the remote locations of wind plants, an HVDC overlay turns out to be attractive for transporting wind energy due to its superiority in long distance transmission of electricity. While reducing environmental concern, the increasing utilization of wind energy forces the power system to operate under a tighter operating margin. The limited reactive capability of wind turbines is insufficient to provide adequate voltage support under stressed system conditions. Moreover, the volatility of wind further aggravates the problem as it brings uncertainty to the available reactive resources and can cause undesirable voltage behavior in the system. The power electronics of the HVDC overlay may also destabilize the gird under abnormal voltage conditions. Such limitations of wind generation have undermined system security and made the power grid more vulnerable to disturbances. This dissertation proposes a Hierarchical Voltage Control (HVC) methodology to optimize the reactive reserve of a power system with high levels of wind penetration. The proposed control architecture consists of three layers. A tertiary Optimal Power Flow computes references for pilot bus voltages. Secondary voltage scheduling adjusts primary control variables to achieve the desired set points. The three levels of the proposed HVC scheme coordinate to optimize the voltage profile of the system and enhance system security. The proposed HVC is tested on an equivalent Western Electricity Coordinated Council (WECC) system modified by a multi-terminal HVDC overlay. The effectiveness of the proposed HVC is validated under a wide range of operating conditions. The capability to manage a future AC/DC hybrid network is studied to allow even higher levels of wind