136 research outputs found

    Energy-Efficient Communication in Wireless Networks

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    This chapter describes the evolution of, and state of the art in, energy‐efficient techniques for wirelessly communicating networks of embedded computers, such as those found in wireless sensor network (WSN), Internet of Things (IoT) and cyberphysical systems (CPS) applications. Specifically, emphasis is placed on energy efficiency as critical to ensuring the feasibility of long lifetime, low‐maintenance and increasingly autonomous monitoring and control scenarios. A comprehensive summary of link layer and routing protocols for a variety of traffic patterns is discussed, in addition to their combination and evaluation as full protocol stacks

    On implementing dynamically reconfigurable architectures

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    Dynamically reconfigurable architectures have the ability to change their structure at each step of a computation. This dissertation studies various aspects of implementing dynamic reconfiguration, ranging from hardware building blocks and low-level architectures to modeling issues and high-level algorithm design. First we derive conditions under which classes of communication sets can be optimally scheduled on the circuit-switched tree (CST). Then we present a method to configure the CST to perform in constant time all communications scheduled for a step. This results in a constant time implementation of a step of a segmentable bus, a fundamental dynamically reconfigurable structure. We introduce a new bus delay measure (bends-cost) and define the bends-cost LR-Mesh; the LR-Mesh is a widely used reconfigurable model. Unlike the (idealized) LR-Mesh, which ignores bus delay, the bends-cost LR-Mesh uses the number of bends in a bus to estimate its delay. We present an implementation for which the bends-cost is an accurate estimate of the actual delay. We present algorithms to simulate various LR-Mesh configuration classes on the bends-cost LR-Mesh. For semimonotonic configurations, a Θ(N)*Θ(N) bends-cost LR-Mesh with bus delay at most D can simulate a step of the idealized N*N LR-Mesh in O((log N/(log D-log Δ))2) time (where Δ is the delay of an N-element segmentable bus), while employing about the same number of processors. For some special cases this time reduces to O(log N/(log D-log Δ)). If D=Nε, for an arbitrarily small constant ε \u3e 0, then the running times of bends-cost LR-Mesh algorithms are within a constant of their idealized counterparts. We also prove that with a polynomial blowup in the number of processors and D=Nε, the bends-cost LR-Mesh can simulate any step of an idealized LR-Mesh in constant time, thereby establishing that these models have the same power. We present an implementation (in VHDL) of the Enhanced Self Reconfigurable Gate Array (E-SRGA) architecture and perform a cost-benefit study for different dynamic reconfiguration features. This study shows our approach to be feasible

    Optimal Sequential Gossiping by Short Messages

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    International audienceGossiping is the process of information di ffusion in which each node of a network holds a block that must be communicated to all the other nodes in the network. We consider the problem of gossiping in communication networks under the restriction that communicating nodes can exchange up to a fixed number p of blocks during each call. We study the minimum numbers of call necessary to perform gossiping among n processor for any arbitrary fixed upper bound on the message size p

    Wireless distributed intelligence in personal applications

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    Tietokoneet ovat historian kuluessa kehittyneet keskustietokoneista hajautettujen, langattomasti toimivien järjestelmien suuntaan. Elektroniikalla toteutetut automaattiset toiminnot ympärillämme lisääntyvät kiihtyvällä vauhdilla. Tällaiset sovellukset lisääntyvät tulevaisuudessa, mutta siihen soveltuva tekniikka on vielä kehityksen alla ja vaadittavia ominaisuuksia ei aina löydy. Nykyiset lyhyen kantaman langattoman tekniikan standardit ovat tarkoitettu lähinnä teollisuuden ja multimedian käyttöön, siksi ne ovat vain osittain soveltuvia uudenlaisiin ympäristöälykkäisiin käyttötarkoituksiin. Ympäristöälykkäät sovellukset palvelevat enimmäkseen jokapäiväistä elämäämme, kuten turvallisuutta, kulunvalvontaa ja elämyspalveluita. Ympäristöälykkäitä ratkaisuja tarvitaan myös hajautetussa automaatiossa ja kohteiden automaattisessa seurannassa. Tutkimuksen aikana Seinäjoen ammattikorkeakoulussa on tutkittu lyhyen kantaman langatonta tekniikkaa: suunniteltu ja kehitetty pienivirtaisia radionappeja, niitten ohjelmointiympäristöä sekä langattoman verkon synkronointia, tiedonkeruuta ja reititystä. Lisäksi on simuloitu eri reititystapoja, sisäpaikannusta ja kaivinkoneen kalibrointia soveltaen mm. neurolaskentaa. Tekniikkaa on testattu myös käytännön sovelluksissa. Ympäristöälykkäät sovellusalueet ovat ehkä nopeimmin kasvava lähitulevaisuuden ala tietotekniikassa. Tutkitulla tekniikalla on runsaasti uusia haasteita ihmisten hyvinvointia, terveyttä ja turvallisuutta lisäävissä sovelluksissa, kuten myös teollisuuden uusissa sovelluksissa, esimerkiksi älykkäässä energiansiirtoverkossa.The development of computing is moving from mainframe computers to distributed intelligence with wireless features. The automated functions around us, in the form of small electronic devices, are increasing and the pace is continuously accelerating. The number of these applications will increase in the future, but suitable features needed are lacking and suitable technology development is still ongoing. The existing wireless short-range standards are mostly suitable for use in industry and in multimedia applications, but they are only partly suitable for the new network feature demands of the ambient intelligence applications. The ambient intelligent applications will serve us in our daily lives: security, access control and exercise services. Ambient intelligence is also adopted by industry in distributed amorphous automation, in access monitoring and the control of machines and devices. During this research, at Seinäjoki University of Applied Sciences, we have researched, designed and developed short-range wireless technology: low-power radio buttons with a programming environment for them as well as synchronization, data collecting and routing features for the wireless network. We have simulated different routing methods, indoor positioning and excavator calibration using for example neurocomputing. In addition, we have tested the technology in practical applications. The ambient intelligent applications are perhaps the area growing the most in information technology in the future. There will be many new challenges to face to increase welfare, health, security, as well as industrial applications (for example, at factories and in smart grids) in the future.fi=vertaisarvioitu|en=peerReviewed

    Wireless Sensor Data Transport, Aggregation and Security

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    abstract: Wireless sensor networks (WSN) and the communication and the security therein have been gaining further prominence in the tech-industry recently, with the emergence of the so called Internet of Things (IoT). The steps from acquiring data and making a reactive decision base on the acquired sensor measurements are complex and requires careful execution of several steps. In many of these steps there are still technological gaps to fill that are due to the fact that several primitives that are desirable in a sensor network environment are bolt on the networks as application layer functionalities, rather than built in them. For several important functionalities that are at the core of IoT architectures we have developed a solution that is analyzed and discussed in the following chapters. The chain of steps from the acquisition of sensor samples until these samples reach a control center or the cloud where the data analytics are performed, starts with the acquisition of the sensor measurements at the correct time and, importantly, synchronously among all sensors deployed. This synchronization has to be network wide, including both the wired core network as well as the wireless edge devices. This thesis studies a decentralized and lightweight solution to synchronize and schedule IoT devices over wireless and wired networks adaptively, with very simple local signaling. Furthermore, measurement results have to be transported and aggregated over the same interface, requiring clever coordination among all nodes, as network resources are shared, keeping scalability and fail-safe operation in mind. Furthermore ensuring the integrity of measurements is a complicated task. On the one hand Cryptography can shield the network from outside attackers and therefore is the first step to take, but due to the volume of sensors must rely on an automated key distribution mechanism. On the other hand cryptography does not protect against exposed keys or inside attackers. One however can exploit statistical properties to detect and identify nodes that send false information and exclude these attacker nodes from the network to avoid data manipulation. Furthermore, if data is supplied by a third party, one can apply automated trust metric for each individual data source to define which data to accept and consider for mentioned statistical tests in the first place. Monitoring the cyber and physical activities of an IoT infrastructure in concert is another topic that is investigated in this thesis.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

    A critical analysis of research potential, challenges and future directives in industrial wireless sensor networks

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    In recent years, Industrial Wireless Sensor Networks (IWSNs) have emerged as an important research theme with applications spanning a wide range of industries including automation, monitoring, process control, feedback systems and automotive. Wide scope of IWSNs applications ranging from small production units, large oil and gas industries to nuclear fission control, enables a fast-paced research in this field. Though IWSNs offer advantages of low cost, flexibility, scalability, self-healing, easy deployment and reformation, yet they pose certain limitations on available potential and introduce challenges on multiple fronts due to their susceptibility to highly complex and uncertain industrial environments. In this paper a detailed discussion on design objectives, challenges and solutions, for IWSNs, are presented. A careful evaluation of industrial systems, deadlines and possible hazards in industrial atmosphere are discussed. The paper also presents a thorough review of the existing standards and industrial protocols and gives a critical evaluation of potential of these standards and protocols along with a detailed discussion on available hardware platforms, specific industrial energy harvesting techniques and their capabilities. The paper lists main service providers for IWSNs solutions and gives insight of future trends and research gaps in the field of IWSNs

    Luotettavuuden ja toisteisuuden toteutus aikakriittiseen televiestintäjärjestelmään

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    Different distributed systems have different requirements for reliability. One way for increasing reliability is fault tolerance. Methods for increasing fault tolerance have been studied for decades, starting from early hardware level fault tolerance until more recent studies for peer-to-peer and cloud computing fault tolerance. In this paper, fault tolerance of an existing telecommunication service platform is studied and improved. Even in the case of a failure of a single server, called a call handler, any data should not be lost. Three sub-problems with different expectations are presented: failure detection, data dissemination and takeover. The implemented failure detection protocol is based on a basic gossip-style heartbeat protocol. The data dissemination protocol is a gossip-style dissemination protocol which, unlike traditional gossip algorithms, does not select its targets fully randomly. Instead, known data about which call handlers have received and might have received a message are used when selecting targets. On top of both, a simple takeover protocol is implemented. Testing was done in a closed environment both for the failure detection and for the data dissemination, as well as for whole the system. The results show that failure detection protocol is able to provide adequate detection times and accuracy. The nature of the implemented data dissemination algorithm is very spamming by the results. The amount of sent messages can, however, be greatly decreased with design decisions. Test results for whole the system indicate that the system is able to provide over 99 % reliability even with large server crash probabilities at least up to call handler amount 16. Unfortunately, resources in the testing environment were limited and that is why memory problems started to occur affecting the test results starting from 17 call handlers. That is why larger call handler amounts could not be tested.Erilaisilla hajautetuilla järjestelmillä on eri vaatimuksia luotettavuudelle. Eräs tapa parantaa luotettavuutta on vikasietoisuuden kasvattaminen. Erilaisia tapoja parantaa vikasietoisuutta on tutkittu jo vuosikymmeniä. Aikaisimmat tutkimukset keskittyivät pääasiallisesti laitteistotason vikasietoisuuteen, mutta viime aikoina päämielenkiinnonkohde on siirtynyt vertaisverkkojen ja pilviteknologioiden vikasietoisuuden tutkimiseen. Tämän opinnäytetyön tarkoituksena on tutkia ja parantaa olemassaolevan televiestintäjärjestelmän luotettavuutta vikasietoisuudella. Päämääränä on toteuttaa ratkaisu, joka pitää huolta ettei tietoa katoa puhelunkäsittelijöiden vikatilanteissa. Varsinainen ongelma on jaettu osa-alueisiin: virheen havaitsemiseen, tiedon levittämiseen ja haltuunottoon. Virheenhavaitsemisprotokolla pohjautuu juorutyyliseen sydämenlyöntiprotokollaan. Tiedon levittäminen on toteutettu juorutyylisellä tiedonlevitysprotokollalla, joka ei valitse lähetyskohteitaan täysin satunnaisesti, toisin kuin perinteinen juoruprotokolla. Sen sijaan valinnassa käytetään hyväksi tietoa verkon jäsenistä, jotka ovat jo vastaanottaneet viestin tai ovat mahdollisesti vastaanottaneet viestin. Puheluiden haltuunottoprotokolla on toteutettu hyödyntäen edellisiä protokollia. Testaus toteutettiin suljetussa ympäristössä. Erilliset testit suoritettiin virheenhavaitsemis- ja tiedon levittämisprotokollille. Lisäksi tehtiin koko järjestelmätason testejä. Virheenhavaitsemisprotokolla näyttää tulosten perusteella tarjoavan riittävän hyvän havaitsemisajan ja -tarkkuuden. Tulosten perusteella tiedonlevittämisprotokolla luo paljon viestejä, mutta viestimääriin pystyy vaikuttamaan protokollasuunnittelulla. Koko järjestelmän testit viittaisivat siihen, että yli 99 % luotettavuus saavutetaan jopa suurilla kaatumistodennäköisyyksillä ainakin 16 puhelunkäsittelijään asti. Testiympäristön resurssit olivat rajoitetut, mistä johtuen jo 17 puhelunkäsittelijän testeissä esiintyi muistiongelmia, jotka vaikuttivat tuloksiin. Suurempia jäsenmääriä ei siksi pystytty testaamaan

    Physical parameter-aware Networks-on-Chip design

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    PhD ThesisNetworks-on-Chip (NoCs) have been proposed as a scalable, reliable and power-efficient communication fabric for chip multiprocessors (CMPs) and multiprocessor systems-on-chip (MPSoCs). NoCs determine both the performance and the reliability of such systems, with a significant power demand that is expected to increase due to developments in both technology and architecture. In terms of architecture, an important trend in many-core systems architecture is to increase the number of cores on a chip while reducing their individual complexity. This trend increases communication power relative to computation power. Moreover, technology-wise, power-hungry wires are dominating logic as power consumers as technology scales down. For these reasons, the design of future very large scale integration (VLSI) systems is moving from being computation-centric to communication-centric. On the other hand, chip’s physical parameters integrity, especially power and thermal integrity, is crucial for reliable VLSI systems. However, guaranteeing this integrity is becoming increasingly difficult with the higher scale of integration due to increased power density and operating frequencies that result in continuously increasing temperature and voltage drops in the chip. This is a challenge that may prevent further shrinking of devices. Thus, tackling the challenge of power and thermal integrity of future many-core systems at only one level of abstraction, the chip and package design for example, is no longer sufficient to ensure the integrity of physical parameters. New designtime and run-time strategies may need to work together at different levels of abstraction, such as package, application, network, to provide the required physical parameter integrity for these large systems. This necessitates strategies that work at the level of the on-chip network with its rising power budget. This thesis proposes models, techniques and architectures to improve power and thermal integrity of Network-on-Chip (NoC)-based many-core systems. The thesis is composed of two major parts: i) minimization and modelling of power supply variations to improve power integrity; and ii) dynamic thermal adaptation to improve thermal integrity. This thesis makes four major contributions. The first is a computational model of on-chip power supply variations in NoCs. The proposed model embeds a power delivery model, an NoC activity simulator and a power model. The model is verified with SPICE simulation and employed to analyse power supply variations in synthetic and real NoC workloads. Novel observations regarding power supply noise correlation with different traffic patterns and routing algorithms are found. The second is a new application mapping strategy aiming vii to minimize power supply noise in NoCs. This is achieved by defining a new metric, switching activity density, and employing a force-based objective function that results in minimizing switching density. Significant reductions in power supply noise (PSN) are achieved with a low energy penalty. This reduction in PSN also results in a better link timing accuracy. The third contribution is a new dynamic thermal-adaptive routing strategy to effectively diffuse heat from the NoC-based threedimensional (3D) CMPs, using a dynamic programming (DP)-based distributed control architecture. Moreover, a new approach for efficient extension of two-dimensional (2D) partially-adaptive routing algorithms to 3D is presented. This approach improves three-dimensional networkon- chip (3D NoC) routing adaptivity while ensuring deadlock-freeness. Finally, the proposed thermal-adaptive routing is implemented in field-programmable gate array (FPGA), and implementation challenges, for both thermal sensing and the dynamic control architecture are addressed. The proposed routing implementation is evaluated in terms of both functionality and performance. The methodologies and architectures proposed in this thesis open a new direction for improving the power and thermal integrity of future NoC-based 2D and 3D many-core architectures

    Multiple Bus Networks for Binary -Tree Algorithms.

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    Multiple bus networks (MBN) connect processors via buses. This dissertation addresses issues related to running binary-tree algorithms on MBNs. These algorithms are of a fundamental nature, and reduce inputs at leaves of a binary tree to a result at the root. We study the relationships between running time, degree (maximum number of connections per processor) and loading (maximum number of connections per bus). We also investigate fault-tolerance, meshes enhanced with MBNs, and VLSI layouts for binary-tree MBNs. We prove that the loading of optimal-time, degree-2, binary-tree MBNs is non-constant. In establishing this result, we derive three loading lower bounds Wn , W&parl0;n23&parr0; and W&parl0;nlogn&parr0; , each tighter than the previous one. We also show that if the degree is increased to 3, then the loading can be a constant. A constant loading degree-2 MBN exists, if the algorithm is allowed to run slower than the optimal. We introduce a new enhanced mesh architecture (employing binary-tree MBNs) that captures features of all existing enhanced meshes. This architecture is more flexible, allowing all existing enhanced mesh results to be ported to a more implementable platform. We present two methods for imparting tolerance to bus and processor faults in binary-tree MBNs. One of the methods is general, and can be used with any MBN and for both processor and bus faults. A key feature of this method is that it permits the network designer to designate a set of buses as unimportant and consider all faulty buses as unimportant. This minimizes the impact of faulty elements on the MBN. The second method is specific to bus faults in binary-tree MBNs, whose features it exploits to produce faster solutions. We also derive a series of results that distill the lower bound on the perimeter layout area of optimal-time, binary-tree MBNs to a single conjecture. Based on this we believe that optimal-time, binary-tree MBNs require no less area than a balanced tree topology even though such MBNs can reuse buses over various steps of the algorithm
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