A tight analysis of Kierstead-Trotter algorithm for online unit interval coloring

Kierstead and Trotter (Congressus Numerantium 33, 1981) proved that their algorithm is an optimal online algorithm for the online interval coloring problem. In this paper, for online unit interval coloring, we show that the number of colors used by the Kierstead-Trotter algorithm is at most $3 \omega(G) - 3$, where $\omega(G)$ is the size of the maximum clique in a given graph $G$, and it is the best possible.Comment: 4 page

Lower Bounds for On-line Interval Coloring with Vector and Cardinality Constraints

We propose two strategies for Presenter in the on-line interval graph coloring games. Specifically, we consider a setting in which each interval is associated with a $d$-dimensional vector of weights and the coloring needs to satisfy the $d$-dimensional bandwidth constraint, and the $k$-cardinality constraint. Such a variant was first introduced by Epstein and Levy and it is a natural model for resource-aware task scheduling with $d$ different shared resources where at most $k$ tasks can be scheduled simultaneously on a single machine. The first strategy forces any on-line interval coloring algorithm to use at least $(5m-3)\frac{d}{\log d + 3}$ different colors on an $m(\frac{d}{k} + \log{d} + 3)$-colorable set of intervals. The second strategy forces any on-line interval coloring algorithm to use at least $\lfloor\frac{5m}{2}\rfloor\frac{d}{\log d + 3}$ different colors on an $m(\frac{d}{k} + \log{d} + 3)$-colorable set of unit intervals

MARACAS: a real-time multicore VCPU scheduling framework

This paper describes a multicore scheduling and load-balancing framework called MARACAS, to address shared cache and memory bus contention. It builds upon prior work centered around the concept of virtual CPU (VCPU) scheduling. Threads are associated with VCPUs that have periodically replenished time budgets. VCPUs are guaranteed to receive their periodic budgets even if they are migrated between cores. A load balancing algorithm ensures VCPUs are mapped to cores to fairly distribute surplus CPU cycles, after ensuring VCPU timing guarantees. MARACAS uses surplus cycles to throttle the execution of threads running on specific cores when memory contention exceeds a certain threshold. This enables threads on other cores to make better progress without interference from co-runners. Our scheduling framework features a novel memory-aware scheduling approach that uses performance counters to derive an average memory request latency. We show that latency-based memory throttling is more effective than rate-based memory access control in reducing bus contention. MARACAS also supports cache-aware scheduling and migration using page recoloring to improve performance isolation amongst VCPUs. Experiments show how MARACAS reduces multicore resource contention, leading to improved task progress.http://www.cs.bu.edu/fac/richwest/papers/rtss_2016.pdfAccepted manuscrip