A model and framework for reliable build systems

Reliable and fast builds are essential for rapid turnaround during development and testing. Popular existing build systems rely on correct manual specification of build dependencies, which can lead to invalid build outputs and nondeterminism. We outline the challenges of developing reliable build systems and explore the design space for their implementation, with a focus on non-distributed, incremental, parallel build systems. We define a general model for resources accessed by build tasks and show its correspondence to the implementation technique of minimum information libraries, APIs that return no information that the application doesn't plan to use. We also summarize preliminary experimental results from several prototype build managers

Logging software upgrade

Vaisala weather instruments testing requires data logging to produce information for decisions making. Data logging is increasingly becoming database focused. Database logging was not usable and available to all users easily, for which reason this thesis aimed to bring database logging into internally used logging software. VB.NET based software was to be updated bringing database logging available to all users. The thesis and development of the software update used empirical research. Software principles were applied from theoretical literacy sources. Not all theoretical principles were applied to the internal software. Most software acceptance requirements were met, and software was evaluated acceptable to use. Especially its productivity was remarkable. However, its development should continue to bring all evaluation subjects to fully satisfying level. Some erroneous issues can escalate in wider use. The software was successfully updated, and it began a new era in its development lifecycle. Software was uploaded into GIT and should continue to be improved to better serve the company and its needs

UML Assisted Visual Debugging for Distributed Systems

The DOD is developing a Joint Battlespace Infosphere, linking a large number of data sources and user applications. To assist in this process, debugging and analysis tools are required. Software debugging is an extremely difficult cognitive process requiring comprehension of the overall application behavior, along with detailed understanding of specific application components. This is further complicated with distributed systems by the addition of other programs, their large size and synchronization issues. Typical debuggers provide inadequate support for this process, focusing primarily on the details accessible through source code. To overcome this deficiency, this research links the dynamic program execution state to a Unified Modeling Language (UML) class diagram that is reverse-engineered from data accessed within the Java Platform Debug Architecture. This research uses focus + context, graph layout, and color encoding techniques to enhance the standard UML diagram. These techniques organize and present objects and events in a manner that facilitates analysis of system behavior. High-level abstractions commonly used in system design support debugging while maintaining access to low-level details with an interactive display. The user is also able to monitor the control flow through highlighting of the relevant object and method in the display

Analysis domain model for shared virtual environments

The field of shared virtual environments, which also encompasses online games and social 3D environments, has a system landscape consisting of multiple solutions that share great functional overlap. However, there is little system interoperability between the different solutions. A shared virtual environment has an associated problem domain that is highly complex raising difficult challenges to the development process, starting with the architectural design of the underlying system. This paper has two main contributions. The first contribution is a broad domain analysis of shared virtual environments, which enables developers to have a better understanding of the whole rather than the part(s). The second contribution is a reference domain model for discussing and describing solutions - the Analysis Domain Model

Research and development of enhanced, integrated and accessible flow metering software for industry.

This project was an investigation to find improvements required in the delivery of software for the flow metering industry. The project has resulted in the repackaging of existing software using appropriate technologies. This included developing software that is accessible via the web and extending functionality whereby a user can import and export information in a variety of data formats. The software was successfully revised and is now commercially accessible to the flow metering industry. The project was performed in the context of a KTP (Knowledge Transfer Partnership) programme with academic supervision provided by TUV NEL (the academic partner) on the premises of KELTON® (the commercial partner) who provided day-to-day project management supervision. The project was in collaboration between the two organisations with the joint aims of facilitating knowledge transfer between the organisations and enhancing the market performance of the commercial partner. The main objective of the study was to gain a full understanding of the needs of the flow metering industry in terms of software and delivery via web or standalone application. Web based applications are new to KELTON® so it was necessary to investigate the methods of delivery. The work concentrated on investigating techniques to modularise code, allowing flexible access to data between applications and on data presentation. iv At an early stage of the project an online market survey program was developed and appropriate questions were used to get customer feedback. The results were analysed and used to prioritise work. Following the review, the current software architecture was found to be unsuitable so new approaches were investigated. The software was created using an n-tier architecture which is a method of splitting common code into separate components. Web based applications were found to be slower than standalone applications. However, web applications benefited from not having to fully install software on individual user PCs therefore allowing access from anywhere that users have access to the network

A generic debug interface for IP-integrated assertions

Der Entwurf von Hardware/Software Systemen ist auf eine solide Verifikationsmethodik angewiesen, die den ganzen Design Flow durchzieht. Viele Konzepte haben eine Erhöhung des Abstraktionsniveaus bei der Entwurfseingabe gemeinsam, wobei der modell-basierte Hardware-Entwurf einen vielversprechenden und sich verbreitenenden Ansatz darstellt. Assertion basierte Verifikation ermöglicht dem Entwickler die Spezifikation von Eigenschaften des Entwurfes und die Aufdeckung von Fällen, in denen diese verletzt werden. Während Assertions in Entwurfs- und Simulationsstadien weit verbreitet sind, ist der Ansatz, diese mit auf dem integrierten Schaltkreis (IC) zu fertigen, neuartig. In dieser Diplomarbeit soll ein von Infineon Technologies entwickeltes, auf UML basierendes Datenmodell, welches zur Erfassung von Entwurfsspezifikation und zur automatischen Code-Generierung genutzt wird dahingehend erweitert werden, die Beschreibung für im IC integrierte Assertions zu ermöglichen. Für diese Zwecke wird ein abstraktes Datenmodell beschrieben werden. Das Assertion Interface soll die spezifikationsgetreue Modellintegration gewährleisten, sowie IC interne Assertionresultate dem umgebenen System über das Interface zugänglich machen und damit zum Debugging während der Laufzeit ermöglichen. Ferner werden die Codegenerierungs Templates erläutert und einBeispielsystem eingeführt, um die beschriebenden Konzepte zu validieren.Nowadays electronic systems design requires fast time to market and solid verification throughout the entire design flow. Many concepts have been researched to raise the level of abstraction during the design entry phase, whereas model-based design is the most promising one. Assertion-based verification enables the developer to specify properties of the design and to get report if these are violated. Assertions are common during development and simulation of electronic products but often are not included in the final silicon. In this thesis an UML-based model defined at Infineon Technologies for capturing design specification information and to generate code automatically using templates, will be extended to allow the description of an abstract debuggable assertion interface for silicon assertions. With help of the assertion interface it shall be possible to verify the correct module integration and to monitor IP-internal assertion checker results. Besides, the code-generation templates for the assertion interface model will be described. To demonstrate the usability of the developed concepts an example system will be introduced to validate the approach.Ilmenau, Techn. Univ., Diplomarbeit, 200