6,047 research outputs found

    Integrated GHz silicon photonic interconnect with micrometer-scale modulators and detectors

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    We report an optical link on silicon using micrometer-scale ring-resonator enhanced silicon modulators and waveguide-integrated germanium photodetectors. We show 3 Gbps operation of the link with 0.5 V modulator voltage swing and 1.0 V detector bias. The total energy consumption for such a link is estimated to be ~120 fJ/bit. Such compact and low power monolithic link is an essential step towards large-scale on-chip optical interconnects for future microprocessors

    Random on-board pixel sampling (ROPS) X-ray Camera

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    Recent advances in compressed sensing theory and algorithms offer new possibilities for high-speed X-ray camera design. In many CMOS cameras, each pixel has an independent on-board circuit that includes an amplifier, noise rejection, signal shaper, an analog-to-digital converter (ADC), and optional in-pixel storage. When X-ray images are sparse, i.e., when one of the following cases is true: (a.) The number of pixels with true X-ray hits is much smaller than the total number of pixels; (b.) The X-ray information is redundant; or (c.) Some prior knowledge about the X-ray images exists, sparse sampling may be allowed. Here we first illustrate the feasibility of random on-board pixel sampling (ROPS) using an existing set of X-ray images, followed by a discussion about signal to noise as a function of pixel size. Next, we describe a possible circuit architecture to achieve random pixel access and in-pixel storage. The combination of a multilayer architecture, sparse on-chip sampling, and computational image techniques, is expected to facilitate the development and applications of high-speed X-ray camera technology.Comment: 9 pages, 6 figures, Presented in 19th iWoRI

    Visible light emission from reverse-biased silicon nanometer-scale diode-antifuses

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    Silicon nanometer-scale diodes have been fabricated to emit light in the visible range at low power consumption. Such structures are candidates for emitter elements in Si-based optical interconnect schemes. Spectral measurements of Electroluminescence (EL) on the reverse-biased nanometer-scale diodes brought into breakdown have been carried out over the photon energy range of 1.4-2.8 eV. Previously proposed mechanisms for avalanche emission from conventional silicon p-n junctions are discussed in order to understand the origin of the emission. Also the stability of the diodes has been tested. Results indicate that our nanometer-scale diodes are basically high quality devices. Furthermore due to the nanometer-scale dimensions, very high electrical fields and current densities are possible at low power consumption. This makes these diodes an excellent candidate to be utilized as a light source in Si-based sensors and actuator application

    Parallel Optical Random Access Memory (PORAM)

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    It is shown that the need to minimize component count, power and size, and to maximize packing density require a parallel optical random access memory to be designed in a two-level hierarchy: a modular level and an interconnect level. Three module designs are proposed, in the order of research and development requirements. The first uses state-of-the-art components, including individually addressed laser diode arrays, acousto-optic (AO) deflectors and magneto-optic (MO) storage medium, aimed at moderate size, moderate power, and high packing density. The next design level uses an electron-trapping (ET) medium to reduce optical power requirements. The third design uses a beam-steering grating surface emitter (GSE) array to reduce size further and minimize the number of components

    Ion traps fabricated in a CMOS foundry

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    We demonstrate trapping in a surface-electrode ion trap fabricated in a 90-nm CMOS (complementary metal-oxide-semiconductor) foundry process utilizing the top metal layer of the process for the trap electrodes. The process includes doped active regions and metal interconnect layers, allowing for co-fabrication of standard CMOS circuitry as well as devices for optical control and measurement. With one of the interconnect layers defining a ground plane between the trap electrode layer and the p-type doped silicon substrate, ion loading is robust and trapping is stable. We measure a motional heating rate comparable to those seen in surface-electrode traps of similar size. This is the first demonstration of scalable quantum computing hardware, in any modality, utilizing a commercial CMOS process, and it opens the door to integration and co-fabrication of electronics and photonics for large-scale quantum processing in trapped-ion arrays.Comment: 4 pages, 3 figure

    PlasMOStor: A metal-oxide-Si field effect plasmonic modulator

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    Realization of chip-based all-optical and optoelectronic computational networks will require ultracompact Si-compatible modulators, ideally comprising dimensions, materials, and functionality similar to electronic complementary metal−oxide−semiconductor (CMOS) components. Here we demonstrate such a modulator, based on field-effect modulation of plasmon waveguide modes in a MOS geometry. Near-infrared transmission between an optical source and drain is controlled by a gate voltage that drives the MOS into accumulation. Using the gate oxide as an optical channel, electro-optic modulation is achieved in device volumes of half of a cubic wavelength with femtojoule switching energies and the potential for gigahertz modulation frequencies

    Teaching photonic integrated circuits with Jupyter notebooks : design, simulation, fabrication

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    At Ghent University, we have built a course curriculum on integrated photonics, and in particular silicon photonics, based on interactive Jupyter Notebooks. This has been used in short workshops, specialization courses at PhD level, as well as the M.Sc. Photonics Engineering program at Ghent University and the Free University of Brussels. The course material teaches the concepts of on-chip waveguides, basic building blocks, circuits, the design process, fabrication and measurements. The Jupyter notebook environment provides an interface where static didactic content (text, figures, movies, formulas) is mixed with Python code that the user can modify and execute, and interactive plots and widgets to explore the effect of changes in circuits or components. The Python environment supplies a host of scientific and engineering libraries, while the photonic capabilities are based on IPKISS, a commercial design framework for photonic integrated circuits by Luceda Photonics. The IPKISS framework allows scripting of layout and simulation directly from the Jupyter notebooks, so the teaching modules contain live circuit simulation, as well as integration with electromagnetic solvers. Because this is a complete design framework, students can also use it to tape out a small chip design which is fabricated through a rapid prototyping service and then measured, allowing the students to validate the actual performance of their design against the original simulation. The scripting in Jupyter notebooks also provides a self-documenting design flow, and the use of an established design tool guarantees that the acquired skills can be transferred to larger, real-world design projects
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